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sunxi_nand_spl: Properly config page-size in the nand ctl register
[platform/kernel/u-boot.git]
/
doc
/
README.mpc85xx
diff --git
a/doc/README.mpc85xx
b/doc/README.mpc85xx
index
5a4b591
..
f9b023f
100644
(file)
--- a/
doc/README.mpc85xx
+++ b/
doc/README.mpc85xx
@@
-26,7
+26,7
@@
Major Config Switches during various boot Modes
----------------------------------------------
NOR boot
- !defined(CONFIG_SYS_RAMBOOT)
+ !defined(CONFIG_SYS_RAMBOOT)
&& !defined(CONFIG_SPL)
NOR boot Secure
!defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SECURE_BOOT)
RAMBOOT(SD, SPI & NAND boot)