Merge branch 'master' of rsync://rsync.denx.de/git/u-boot

[platform/kernel/u-boot.git] / cpu / mpc8xx / fec.c

diff --git a/cpu/mpc8xx/fec.c b/cpu/mpc8xx/fec.c
index 34a4b20..6006478 100644 (file)
--- a/cpu/mpc8xx/fec.c
+++ b/cpu/mpc8xx/fec.c
@@ -27,6 +27,8 @@
 #include <net.h>
 #include <command.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #undef ET_DEBUG
 
 #if (CONFIG_COMMANDS & CFG_CMD_NET) && \
@@ -46,6 +48,11 @@
 
 #if defined(WANT_MII)
 #include <miiphy.h>
+
+#if !(defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII))
+#error "CONFIG_MII has to be defined!"
+#endif
+
 #endif
 
 #if defined(CONFIG_RMII) && !defined(WANT_MII)
@@ -56,6 +63,11 @@
 static int mii_discover_phy(struct eth_device *dev);
 #endif
 
+int fec8xx_miiphy_read(char *devname, unsigned char addr,
+               unsigned char  reg, unsigned short *value);
+int fec8xx_miiphy_write(char *devname, unsigned char  addr,
+               unsigned char  reg, unsigned short value);
+
 static struct ether_fcc_info_s
 {
        int ether_index;
@@ -169,6 +181,11 @@ int fec_initialize(bd_t *bis)
                dev->recv = fec_recv;
 
                eth_register(dev);
+
+#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+               miiphy_register(dev->name,
+                       fec8xx_miiphy_read, fec8xx_miiphy_write);
+#endif
        }
        return 1;
 }
@@ -356,7 +373,6 @@ static inline void fec_half_duplex(struct eth_device *dev)
 
 static void fec_pin_init(int fecidx)
 {
-       DECLARE_GLOBAL_DATA_PTR;
        bd_t           *bd = gd->bd;
        volatile immap_t *immr = (immap_t *) CFG_IMMR;
        volatile fec_t *fecp;
@@ -383,12 +399,12 @@ static void fec_pin_init(int fecidx)
         */
        fecp->fec_mii_speed = ((bd->bi_intfreq + 4999999) / 5000000) << 1;
 
-#if defined(CONFIG_NETTA) || defined(CONFIG_NETPHONE)
+#if defined(CONFIG_NETTA) || defined(CONFIG_NETPHONE) || defined(CONFIG_NETTA2)
        /* our PHYs are the limit at 2.5 MHz */
        fecp->fec_mii_speed <<= 1;
 #endif
 
-#if defined(CONFIG_DUET) && defined(WANT_MII)
+#if defined(CONFIG_MPC885_FAMILY) && defined(WANT_MII)
        /* use MDC for MII */
        immr->im_ioport.iop_pdpar |=  0x0080;
        immr->im_ioport.iop_pddir &= ~0x0080;
@@ -397,7 +413,7 @@ static void fec_pin_init(int fecidx)
        if (fecidx == 0) {
 #if defined(CONFIG_ETHER_ON_FEC1)
 
-#if defined(CONFIG_DUET)       /* MPC87x/88x have got 2 FECs and different pinout */
+#if defined(CONFIG_MPC885_FAMILY) /* MPC87x/88x have got 2 FECs and different pinout */
 
 #if !defined(CONFIG_RMII)
 
@@ -489,7 +505,7 @@ static void fec_pin_init(int fecidx)
 
 #if defined(CONFIG_ETHER_ON_FEC2)
 
-#if defined(CONFIG_DUET)       /* MPC87x/88x have got 2 FECs and different pinout */
+#if defined(CONFIG_MPC885_FAMILY) /* MPC87x/88x have got 2 FECs and different pinout */
 
 #if !defined(CONFIG_RMII)
 
@@ -516,7 +532,7 @@ static void fec_pin_init(int fecidx)
                immr->im_cpm.cp_cptr      &= ~0x00000028;
 #endif /* CONFIG_RMII */
 
-#endif /* CONFIG_DUET */
+#endif /* CONFIG_MPC885_FAMILY */
 
 #endif /* CONFIG_ETHER_ON_FEC2 */
 
@@ -533,7 +549,7 @@ static int fec_init (struct eth_device *dev, bd_t * bd)
 
        if (efis->ether_index == 0) {
 #if defined(CONFIG_FADS)       /* FADS family uses FPGA (BCSR) to control PHYs */
-#if defined(CONFIG_DUET_ADS)
+#if defined(CONFIG_MPC885ADS)
                *(vu_char *) BCSR5 &= ~(BCSR5_MII1_EN | BCSR5_MII1_RST);
 #else
                /* configure FADS for fast (FEC) ethernet, half-duplex */
@@ -553,7 +569,7 @@ static int fec_init (struct eth_device *dev, bd_t * bd)
                        *bcsr4 |= BCSR4_FETHRST;
                        udelay (10);
                }
-#endif /* CONFIG_DUET_ADS */
+#endif /* CONFIG_MPC885ADS */
 #endif /* CONFIG_FADS */
        }
 
@@ -689,13 +705,14 @@ static int fec_init (struct eth_device *dev, bd_t * bd)
                 * wait for the PHY to wake up after reset
                 */
                efis->actual_phy_addr = mii_discover_phy (dev);
-#else
-               efis->actual_phy_addr = -1;
-#endif
+
                if (efis->actual_phy_addr == -1) {
                        printf ("Unable to discover phy!\n");
                        return 0;
                }
+#else
+               efis->actual_phy_addr = -1;
+#endif
        } else {
                efis->actual_phy_addr = efis->phy_addr;
        }
@@ -711,7 +728,7 @@ static int fec_init (struct eth_device *dev, bd_t * bd)
        /*
         * adapt the RMII speed to the speed of the phy
         */
-       if (miiphy_speed (efis->actual_phy_addr) == _100BASET) {
+       if (miiphy_speed (dev->name, efis->actual_phy_addr) == _100BASET) {
                fec_100Mbps (dev);
        } else {
                fec_10Mbps (dev);
@@ -722,7 +739,7 @@ static int fec_init (struct eth_device *dev, bd_t * bd)
        /*
         * adapt to the half/full speed settings
         */
-       if (miiphy_duplex (efis->actual_phy_addr) == FULL) {
+       if (miiphy_duplex (dev->name, efis->actual_phy_addr) == FULL) {
                fec_full_duplex (dev);
        } else {
                fec_half_duplex (dev);
@@ -947,7 +964,7 @@ void mii_init (void)
         */
        fecp->fec_ievent = 0xffc0;
 
-               /* Setup the pin configuration of the FEC(s)
+       /* Setup the pin configuration of the FEC(s)
        */
                fec_pin_init(ether_fcc_info[i].ether_index);
 
@@ -968,7 +985,8 @@ void mii_init (void)
  *       Otherwise they hang in mii_send() !!! Sorry!
  *****************************************************************************/
 
-int miiphy_read(unsigned char addr, unsigned char  reg, unsigned short *value)
+int fec8xx_miiphy_read(char *devname, unsigned char addr,
+               unsigned char  reg, unsigned short *value)
 {
        short rdreg;    /* register working value */
 
@@ -984,7 +1002,8 @@ int miiphy_read(unsigned char addr, unsigned char  reg, unsigned short *value)
        return 0;
 }
 
-int miiphy_write(unsigned char  addr, unsigned char  reg, unsigned short value)
+int fec8xx_miiphy_write(char *devname, unsigned char  addr,
+               unsigned char  reg, unsigned short value)
 {
        short rdreg;    /* register working value */
 #ifdef MII_DEBUG