#include <ppc_asm.tmpl>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* --------------------------------------------------------------- */
void get_sys_info (sys_info_t * sysInfo)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_gur_t *gur = &immap->im_gur;
- uint plat_ratio,e500_ratio;
+ volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
+ uint plat_ratio,e500_ratio,half_freqSystemBus;
plat_ratio = (gur->porpllsr) & 0x0000003e;
plat_ratio >>= 1;
- switch(plat_ratio) {
- case 0x02:
- case 0x03:
- case 0x04:
- case 0x05:
- case 0x06:
- case 0x08:
- case 0x09:
- case 0x0a:
- case 0x0c:
- case 0x10:
- sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
- break;
- default:
- sysInfo->freqSystemBus = 0;
- break;
- }
-
+ sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
e500_ratio = (gur->porpllsr) & 0x003f0000;
e500_ratio >>= 16;
- switch(e500_ratio) {
- case 0x04:
- sysInfo->freqProcessor = 2*sysInfo->freqSystemBus;
- break;
- case 0x05:
- sysInfo->freqProcessor = 5*sysInfo->freqSystemBus/2;
- break;
- case 0x06:
- sysInfo->freqProcessor = 3*sysInfo->freqSystemBus;
- break;
- case 0x07:
- sysInfo->freqProcessor = 7*sysInfo->freqSystemBus/2;
- break;
- default:
- sysInfo->freqProcessor = 0;
- break;
+
+ /* Divide before multiply to avoid integer
+ * overflow for processor speeds above 2GHz */
+ half_freqSystemBus = sysInfo->freqSystemBus/2;
+ sysInfo->freqProcessor = e500_ratio*half_freqSystemBus;
+ sysInfo->freqDDRBus = sysInfo->freqSystemBus;
+
+#ifdef CONFIG_DDR_CLK_FREQ
+ {
+ u32 ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9;
+ if (ddr_ratio != 0x7)
+ sysInfo->freqDDRBus = ddr_ratio * CONFIG_DDR_CLK_FREQ;
}
+#endif
}
+
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
sys_info_t sys_info;
#if defined(CONFIG_CPM2)
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
uint sccr, dfbrg;
/* set VCO = 4 * BRG */
- immap->im_cpm.im_cpm_intctl.sccr &= 0xfffffffc;
- sccr = immap->im_cpm.im_cpm_intctl.sccr;
+ cpm->im_cpm_intctl.sccr &= 0xfffffffc;
+ sccr = cpm->im_cpm_intctl.sccr;
dfbrg = (sccr & SCCR_DFBRG_MSK) >> SCCR_DFBRG_SHIFT;
#endif
get_sys_info (&sys_info);
return val;
}
+
+/********************************************
+ * get_ddr_freq
+ * return ddr bus freq in Hz
+ *********************************************/
+ulong get_ddr_freq (ulong dummy)
+{
+ ulong val;
+
+ sys_info_t sys_info;
+
+ get_sys_info (&sys_info);
+ val = sys_info.freqDDRBus;
+
+ return val;
+}