Merge 'next' branch

[platform/kernel/u-boot.git] / cpu / mpc85xx / speed.c

diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c
index 70dfad0..1e0f483 100644 (file)
--- a/cpu/mpc85xx/speed.c
+++ b/cpu/mpc85xx/speed.c
@@ -35,7 +35,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 void get_sys_info (sys_info_t * sysInfo)
 {
-       volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
+       volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
        uint plat_ratio,e500_ratio,half_freqSystemBus;
 
        plat_ratio = (gur->porpllsr) & 0x0000003e;
@@ -67,10 +67,10 @@ int get_clocks (void)
 {
        sys_info_t sys_info;
 #ifdef CONFIG_MPC8544
-       volatile ccsr_gur_t *gur = (void *) CFG_MPC85xx_GUTS_ADDR;
+       volatile ccsr_gur_t *gur = (void *) CONFIG_SYS_MPC85xx_GUTS_ADDR;
 #endif
 #if defined(CONFIG_CPM2)
-       volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
+       volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR;
        uint sccr, dfbrg;
 
        /* set VCO = 4 * BRG */
@@ -102,9 +102,9 @@ int get_clocks (void)
         * PORDEVSR2_SEC_CFG bit is 0 on all 85xx boards that are not an 8544.
         */
        if (gur->pordevsr2 & MPC85xx_PORDEVSR2_SEC_CFG)
-               gd->i2c1_clk = sys_info.freqSystemBus / 2;
-       else
                gd->i2c1_clk = sys_info.freqSystemBus / 3;
+       else
+               gd->i2c1_clk = sys_info.freqSystemBus / 2;
 #else
        /* Most 85xx SOCs use CCB/2, so this is the default behavior. */
        gd->i2c1_clk = sys_info.freqSystemBus / 2;