Merge with git://www.denx.de/git/u-boot.git
[platform/kernel/u-boot.git] / cpu / mpc85xx / pci.c
index ca11bce..db09e45 100644 (file)
@@ -29,6 +29,9 @@
 #include <asm/cpm_85xx.h>
 #include <pci.h>
 
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#endif
 
 #if defined(CONFIG_PCI)
 
@@ -42,7 +45,9 @@ pci_mpc85xx_init(struct pci_controller *board_hose)
 
        volatile immap_t    *immap = (immap_t *)CFG_CCSRBAR;
        volatile ccsr_pcix_t *pcix = &immap->im_pcix;
+#ifdef CONFIG_MPC85XX_PCI2
        volatile ccsr_pcix_t *pcix2 = &immap->im_pcix2;
+#endif
        volatile ccsr_gur_t *gur = &immap->im_gur;
        struct pci_controller * hose;
 
@@ -72,6 +77,9 @@ pci_mpc85xx_init(struct pci_controller *board_hose)
 
        if (!(gur->pordevsr & PORDEVSR_PCI)) {
                /* PCI-X init */
+               if (CONFIG_SYS_CLK_FREQ < 66000000)
+                       printf("PCI-X will only work at 66 MHz\n");
+
                reg16 = PCI_X_CMD_MAX_SPLIT | PCI_X_CMD_MAX_READ
                        | PCI_X_CMD_ERO | PCI_X_CMD_DPERR_E;
                pci_hose_write_config_word(hose, dev, PCIX_COMMAND, reg16);
@@ -82,14 +90,14 @@ pci_mpc85xx_init(struct pci_controller *board_hose)
        pcix->powbar1  = (CFG_PCI1_MEM_PHYS >> 12) & 0x000fffff;
        pcix->powbear1 = 0x00000000;
        pcix->powar1 = (POWAR_EN | POWAR_MEM_READ |
-                       POWAR_MEM_WRITE | POWAR_MEM_512M);
+                       POWAR_MEM_WRITE | (__ilog2(CFG_PCI1_MEM_SIZE) - 1));
 
        pcix->potar2  = (CFG_PCI1_IO_BASE >> 12) & 0x000fffff;
        pcix->potear2  = 0x00000000;
        pcix->powbar2  = (CFG_PCI1_IO_PHYS >> 12) & 0x000fffff;
        pcix->powbear2 = 0x00000000;
        pcix->powar2 = (POWAR_EN | POWAR_IO_READ |
-                       POWAR_IO_WRITE | POWAR_IO_1M);
+                       POWAR_IO_WRITE | (__ilog2(CFG_PCI1_IO_SIZE) - 1));
 
        pcix->pitar1 = 0x00000000;
        pcix->piwbar1 = 0x00000000;
@@ -134,7 +142,7 @@ pci_mpc85xx_init(struct pci_controller *board_hose)
                u8 header_type;
 
                pci_hose_read_config_byte(hose,
-                                         PCI_BDF(0,17,0),
+                                         PCI_BDF(0,BRIDGE_ID,0),
                                          PCI_HEADER_TYPE,
                                          &header_type);
        }
@@ -167,14 +175,14 @@ pci_mpc85xx_init(struct pci_controller *board_hose)
        pcix2->powbar1  = (CFG_PCI2_MEM_PHYS >> 12) & 0x000fffff;
        pcix2->powbear1 = 0x00000000;
        pcix2->powar1 = (POWAR_EN | POWAR_MEM_READ |
-                       POWAR_MEM_WRITE | POWAR_MEM_512M);
+                       POWAR_MEM_WRITE | (__ilog2(CFG_PCI2_MEM_SIZE) - 1));
 
        pcix2->potar2  = (CFG_PCI2_IO_BASE >> 12) & 0x000fffff;
        pcix2->potear2  = 0x00000000;
        pcix2->powbar2  = (CFG_PCI2_IO_PHYS >> 12) & 0x000fffff;
        pcix2->powbear2 = 0x00000000;
        pcix2->powar2 = (POWAR_EN | POWAR_IO_READ |
-                       POWAR_IO_WRITE | POWAR_IO_1M);
+                       POWAR_IO_WRITE | (__ilog2(CFG_PCI2_IO_SIZE) - 1));
 
        pcix2->pitar1 = 0x00000000;
        pcix2->piwbar1 = 0x00000000;