Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx

[platform/kernel/u-boot.git] / cpu / mpc83xx / start.S

diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S
index 6ee9ec9..c182174 100644 (file)
--- a/cpu/mpc83xx/start.S
+++ b/cpu/mpc83xx/start.S
@@ -263,7 +263,7 @@ _start_of_vectors:
 /* Alignment exception. */
        . = 0x600
 Alignment:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        mfspr   r4,DAR
        stw     r4,_DAR(r21)
        mfspr   r5,DSISR
@@ -282,7 +282,7 @@ Alignment:
 /* Program check exception */
        . = 0x700
 ProgramCheck:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        addi    r3,r1,STACK_FRAME_OVERHEAD
        li      r20,MSR_KERNEL
        rlwimi  r20,r23,0,16,16         /* copy EE bit from saved MSR */
@@ -462,7 +462,7 @@ init_e300_core: /* time t 10 */
 
        li      r4, 0x556C
        sth     r4, SWSRR@l(r3)
-       li      r4, 0xAA39
+       li      r4, -0x55C7
        sth     r4, SWSRR@l(r3)
 #else
        /* Disable Wathcdog  */
@@ -557,7 +557,7 @@ invalidate_bats:
        mtspr   IBAT1U, r0
        mtspr   IBAT2U, r0
        mtspr   IBAT3U, r0
-#if (CFG_HID2 & HID2_HBE)
+#ifdef CONFIG_HIGH_BATS
        mtspr   IBAT4U, r0
        mtspr   IBAT5U, r0
        mtspr   IBAT6U, r0
@@ -568,7 +568,7 @@ invalidate_bats:
        mtspr   DBAT1U, r0
        mtspr   DBAT2U, r0
        mtspr   DBAT3U, r0
-#if (CFG_HID2 & HID2_HBE)
+#ifdef CONFIG_HIGH_BATS
        mtspr   DBAT4U, r0
        mtspr   DBAT5U, r0
        mtspr   DBAT6U, r0
@@ -655,7 +655,7 @@ setup_bats:
        mtspr   DBAT3U, r3
        isync
 
-#if (CFG_HID2 & HID2_HBE)
+#ifdef CONFIG_HIGH_BATS
        /* IBAT 4 */
        addis   r4, r0, CFG_IBAT4L@h
        ori     r4, r4, CFG_IBAT4L@l
@@ -840,40 +840,6 @@ get_pvr:
        mfspr   r3, PVR
        blr
 
-/*------------------------------------------------------------------------------- */
-/* Function:    ppcDcbf */
-/* Description:         Data Cache block flush */
-/* Input:       r3 = effective address */
-/* Output:      none. */
-/*------------------------------------------------------------------------------- */
-       .globl  ppcDcbf
-ppcDcbf:
-       dcbf    r0,r3
-       blr
-
-/*------------------------------------------------------------------------------- */
-/* Function:    ppcDcbi */
-/* Description:         Data Cache block Invalidate */
-/* Input:       r3 = effective address */
-/* Output:      none. */
-/*------------------------------------------------------------------------------- */
-       .globl  ppcDcbi
-ppcDcbi:
-       dcbi    r0,r3
-       blr
-
-/*--------------------------------------------------------------------------
- * Function:    ppcDcbz
- * Description:         Data Cache block zero.
- * Input:       r3 = effective address
- * Output:      none.
- *-------------------------------------------------------------------------- */
-
-       .globl  ppcDcbz
-ppcDcbz:
-       dcbz    r0,r3
-       blr
-
        .globl  ppcDWstore
 ppcDWstore:
        lfd     1, 0(r4)