void at91_serial0_hw_init(void)
{
+ at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+
at91_set_a_periph(AT91_PIO_PORTA, 6, 1); /* TXD0 */
at91_set_a_periph(AT91_PIO_PORTA, 7, 0); /* RXD0 */
- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US0);
+ writel(1 << AT91SAM9RL_ID_US0, &pmc->pcer);
}
void at91_serial1_hw_init(void)
{
+ at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+
at91_set_a_periph(AT91_PIO_PORTA, 11, 1); /* TXD1 */
at91_set_a_periph(AT91_PIO_PORTA, 12, 0); /* RXD1 */
- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US1);
+ writel(1 << AT91SAM9RL_ID_US1, &pmc->pcer);
}
void at91_serial2_hw_init(void)
{
+ at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+
at91_set_a_periph(AT91_PIO_PORTA, 13, 1); /* TXD2 */
at91_set_a_periph(AT91_PIO_PORTA, 14, 0); /* RXD2 */
- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US2);
+ writel(1 << AT91SAM9RL_ID_US2, &pmc->pcer);
}
void at91_serial3_hw_init(void)
{
+ at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+
at91_set_a_periph(AT91_PIO_PORTA, 21, 0); /* DRXD */
at91_set_a_periph(AT91_PIO_PORTA, 22, 1); /* DTXD */
- at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
+ writel(1 << AT91_ID_SYS, &pmc->pcer);
}
void at91_serial_hw_init(void)
#ifdef CONFIG_HAS_DATAFLASH
void at91_spi0_hw_init(unsigned long cs_mask)
{
+ at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+
at91_set_a_periph(AT91_PIO_PORTA, 25, 0); /* SPI0_MISO */
at91_set_a_periph(AT91_PIO_PORTA, 26, 0); /* SPI0_MOSI */
at91_set_a_periph(AT91_PIO_PORTA, 27, 0); /* SPI0_SPCK */
/* Enable clock */
- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI);
+ writel(1 << AT91SAM9RL_ID_SPI, &pmc->pcer);
if (cs_mask & (1 << 0)) {
at91_set_a_periph(AT91_PIO_PORTA, 28, 1);