int timer_load_val = 0;
/* macro to read the 16 bit timer */
-#define READ_TIMER (rTCNTO4 & 0xffff)
+static inline ulong READ_TIMER(void)
+{
+ S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
+
+ return (timers->TCNTO4 & 0xffff);
+}
#ifdef CONFIG_USE_IRQ
/* enable IRQ interrupts */
#endif
-
void bad_mode (void)
{
panic ("Resetting CPU ...\n");
int interrupt_init (void)
{
+ S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
+
/* use PWM Timer 4 because it has no output */
/* prescaler for Timer 4 is 16 */
- rTCFG0 = 0x0f00;
+ timers->TCFG0 = 0x0f00;
if (timer_load_val == 0)
{
/*
timer_load_val = get_PCLK()/(2 * 16 * 100);
}
/* load value for 10 ms timeout */
- lastdec = rTCNTB4 = timer_load_val;
+ lastdec = timers->TCNTB4 = timer_load_val;
/* auto load, manual update of Timer 4 */
- rTCON = 0x600000;
+ timers->TCON = (timers->TCON & ~0x0700000) | 0x600000;
/* auto load, start Timer 4 */
- rTCON = 0x500000;
+ timers->TCON = (timers->TCON & ~0x0700000) | 0x500000;
timestamp = 0;
return (0);
void udelay (unsigned long usec)
{
ulong tmo;
+ ulong start = get_timer(0);
tmo = usec / 1000;
tmo *= (timer_load_val * 100);
tmo /= 1000;
- tmo += get_timer (0);
-
- while (get_timer_masked () < tmo)
+ while ((ulong)(get_timer_masked () - start) < tmo)
/*NOP*/;
}
void reset_timer_masked (void)
{
/* reset time */
- lastdec = READ_TIMER;
+ lastdec = READ_TIMER();
timestamp = 0;
}
ulong get_timer_masked (void)
{
- ulong now = READ_TIMER;
+ ulong now = READ_TIMER();
if (lastdec >= now) {
/* normal mode */
#if defined(CONFIG_SMDK2400) || defined(CONFIG_TRAB)
tbclk = timer_load_val * 100;
-#elif defined(CONFIG_SMDK2410)
+#elif defined(CONFIG_SMDK2410) || defined(CONFIG_VCMA9)
tbclk = CFG_HZ;
+#else
+# error "tbclk not configured"
#endif
return tbclk;