Convert CONFIG_LBA48 et al to Kconfig

[platform/kernel/u-boot.git] / configs / chromebook_coral_defconfig

diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig
index c04b0dd..60c50e7 100644 (file)
--- a/configs/chromebook_coral_defconfig
+++ b/configs/chromebook_coral_defconfig
@@ -9,9 +9,9 @@ CONFIG_SPL_TEXT_BASE=0xfef10000
 CONFIG_TPL_TEXT_BASE=0xffff8000
 CONFIG_SPL_SYS_MALLOC_F_LEN=0xf000
 CONFIG_BOOTSTAGE_STASH_ADDR=0xfef00000
-CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0xde000000
 CONFIG_DEBUG_UART_CLOCK=1843200
+CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_VENDOR_GOOGLE=y
 CONFIG_TARGET_CHROMEBOOK_CORAL=y
 CONFIG_DEBUG_UART=y
@@ -22,6 +22,7 @@ CONFIG_X86_OFFSET_U_BOOT=0xffd00000
 CONFIG_X86_OFFSET_SPL=0xffe80000
 CONFIG_INTEL_ACPIGEN=y
 CONFIG_INTEL_GENERIC_WIFI=y
+CONFIG_SYS_MONITOR_BASE=0x01110000
 CONFIG_CHROMEOS=y
 CONFIG_BOOTSTAGE=y
 CONFIG_SPL_BOOTSTAGE=y
@@ -40,16 +41,18 @@ CONFIG_BLOBLIST=y
 # CONFIG_TPL_BLOBLIST is not set
 CONFIG_BLOBLIST_ADDR=0x100000
 CONFIG_BLOBLIST_SIZE=0x30000
+CONFIG_SPL_NO_BSS_LIMIT=y
 CONFIG_HANDOFF=y
-CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_SEPARATE_BSS=y
 CONFIG_SPL_CPU=y
 CONFIG_SPL_DM_SPI_FLASH=y
 CONFIG_SPL_PCI=y
 CONFIG_SPL_POWER=y
 # CONFIG_SPL_SPI_FLASH_TINY is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_TPL_POWER=y
 CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PBSIZE=532
 CONFIG_CMD_CPU=y
 CONFIG_CMD_PMC=y
 CONFIG_CMD_GPIO=y
@@ -59,6 +62,7 @@ CONFIG_CMD_READ=y
 CONFIG_CMD_SATA=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
+CONFIG_BOOTP_BOOTFILESIZE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_SOUND=y
 CONFIG_CMD_BOOTSTAGE=y
@@ -83,11 +87,12 @@ CONFIG_TFTP_TSIZE=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_CPU=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_MISC=y
-CONFIG_TPL_MISC=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_LPC=y
 CONFIG_SPI_FLASH_WINBOND=y