Merge tag 'tpm-030822' of https://source.denx.de/u-boot/custodians/u-boot-tpm

[platform/kernel/u-boot.git] / configs / P1020RDB-PC_36BIT_SPIFLASH_defconfig

diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index ee0fdd6..1786b94 100644 (file)
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -1,6 +1,5 @@
 CONFIG_PPC=y
-CONFIG_SYS_IMMR=0xFFE00000
-CONFIG_SYS_TEXT_BASE=0x11001000
+CONFIG_SYS_TEXT_BASE=0x11000000
 CONFIG_SYS_MALLOC_LEN=0x100000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
@@ -8,7 +7,7 @@ CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x100000
 CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
-CONFIG_SPL_TEXT_BASE=0xf8f81000
+CONFIG_SPL_TEXT_BASE=0xf8f80000
 CONFIG_SPL_SERIAL=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -16,13 +15,18 @@ CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_MPC85XX_NO_RESETVEC=y
+CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
+CONFIG_PCIE1=y
+CONFIG_PCIE2=y
 CONFIG_PHYS_64BIT=y
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000
+CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000
 CONFIG_SPIFLASH=y
 CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTCOMMAND=y
@@ -31,12 +35,22 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_BOARD_EARLY_INIT_R=y
 # CONFIG_MISC_INIT_R is not set
 # CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MAX_SIZE=0x20000
 CONFIG_SPL_SPI_BOOT=y
+CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
+CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_GD_ADDR=0xf8f9c000
+CONFIG_SPL_RELOC_STACK=0xf8f9d000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
+CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
@@ -57,8 +71,11 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
+CONFIG_SYS_DDR_RAW_TIMING=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7
@@ -68,6 +85,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF
 CONFIG_SYS_BR3_PRELIM_BOOL=y
 CONFIG_SYS_BR3_PRELIM=0xFFA00801
 CONFIG_SYS_OR3_PRELIM=0xFFF009F7
+CONFIG_SPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
@@ -81,7 +99,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
@@ -109,5 +130,6 @@ CONFIG_DM_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_FSL=y
+CONFIG_USB_MAX_CONTROLLER_COUNT=2
 CONFIG_USB_STORAGE=y
 CONFIG_ADDR_MAP=y