#ifndef COMMON_MIPS64
#define COMMON_MIPS64
-#define MB
-#define WMB
+#define MB __sync_synchronize()
+#define WMB __sync_synchronize()
#define INLINE inline
} while (ret);
}
+#define BLAS_LOCK_DEFINED
static inline unsigned int rpcc(void){
unsigned long ret;
-#if defined(LOONGSON3A) || defined(LOONGSON3B)
+
// unsigned long long tmp;
//__asm__ __volatile__("dmfc0 %0, $25, 1": "=r"(tmp):: "memory");
//ret=tmp;
"rdhwr %0, $2\n"
".set pop": "=r"(ret):: "memory");
-#else
- __asm__ __volatile__(".set push \n"
- ".set mips32r2\n"
- "rdhwr %0, $30 \n"
- ".set pop" : "=r"(ret) : : "memory");
-#endif
return ret;
}
+#define RPCC_DEFINED
-#if defined(LOONGSON3A) || defined(LOONGSON3B)
#ifndef NO_AFFINITY
#define WHEREAMI
static inline int WhereAmI(void){
}
#endif
-#endif
static inline int blas_quickdivide(blasint x, blasint y){
return x / y;