of SRAM available for SPL when the stack required before reolcation
uses this SRAM, too.
+config SPL_MAX_SIZE
+ hex "Maximum size of the SPL image, excluding BSS"
+ default 0x30000 if ARCH_MX6 && MX6_OCRAM_256KB
+ default 0x1b000 if AM33XX && !TI_SECURE_DEVICE
+ default 0x10000 if ARCH_MX6 && !MX6_OCRAM_256KB
+ default 0x7fa0 if SUNXI_SRAM_ADDRESS = 0x10000
+ default 0x7fa0 if SUNXI_SRAM_ADDRESS = 0x20000 && !MACH_SUN50I_H616
+ default 0x7000 if RCAR_GEN3
+ default 0x5fa0 if SUNXI_SRAM_ADDRESS = 0x0
+ default 0x0
+ help
+ Maximum size of the SPL image (text, data, rodata, and linker lists
+ sections), BSS excluded. When defined, the linker checks that the
+ actual size does not exceed it.
+
+config SPL_PAD_TO
+ hex "Offset to which the SPL should be padded before appending the SPL payload"
+ default 0x31000 if ARCH_MX6 && MX6_OCRAM_256KB
+ default 0x11000 if ARCH_MX7 || (ARCH_MX6 && !MX6_OCRAM_256KB)
+ default 0x10000 if ARCH_KEYSTONE
+ default 0x8000 if ARCH_SUNXI && !MACH_SUN50I_H616
+ default TPL_MAX_SIZE if TPL_MAX_SIZE > SPL_MAX_SIZE
+ default SPL_MAX_SIZE
+ help
+ Image offset to which the SPL should be padded before appending the
+ SPL payload. By default, this is defined as CONFIG_SPL_MAX_SIZE, or 0 if
+ CONFIG_SPL_MAX_SIZE is undefined. CONFIG_SPL_PAD_TO must be either
+ 0, meaning to append the SPL payload without any padding, or >=
+ CONFIG_SPL_MAX_SIZE.
+
+config SPL_HAS_BSS_LINKER_SECTION
+ depends on SPL_FRAMEWORK
+ bool "Use a specific address for the BSS via the linker script"
+ default y if ARCH_SUNXI || ARCH_MX6 || ARCH_OMAP2PLUS || MIPS || RISCV
+
+config SPL_BSS_START_ADDR
+ hex "Link address for the BSS within the SPL binary"
+ depends on SPL_HAS_BSS_LINKER_SECTION
+ default 0x88200000 if (ARCH_MX6 && (MX6SX || MX6SL || MX6UL || MX6ULL)) || ARCH_MX7
+ default 0x18200000 if ARCH_MX6 && !(MX6SX || MX6SL || MX6UL || MX6ULL)
+ default 0x80a00000 if ARCH_OMAP2PLUS
+ default 0x81f80000 if ARCH_SUNXI && MACH_SUNIV
+ default 0x4ff80000 if ARCH_SUNXI && !(MACH_SUN9I || MACH_SUNIV)
+ default 0x2ff80000 if ARCH_SUNXI && MACH_SUN9I
+
+choice
+ prompt "Enforce SPL BSS limit"
+ depends on SPL && !PPC
+ default SPL_BSS_LIMIT
+ help
+ In some platforms we only want to enforce a limit on the size of the
+ BSS in memory. On other platforms we need to enforce a limit on the
+ whole of the memory allocation as we're strictly limited to a small
+ typically non-DRAM location. Finally, other platforms do not enforce
+ a memory limit within SPL.
+
+config SPL_NO_BSS_LIMIT
+ bool "Do not enforce a build time limit on the size of the BSS"
+
+config SPL_BSS_LIMIT
+ bool "Enforce a limit on the size of the BSS only"
+
+config SPL_FOOTPRINT_LIMIT
+ bool "Enforce a limit on the whole of memory allocated to SPL, BSS included"
+
+endchoice
+
+config SPL_BSS_MAX_SIZE
+ hex "Maximum size in memory allocated to the SPL BSS"
+ depends on SPL_BSS_LIMIT
+ default 0x100000 if ARCH_MX6 || RISCV
+ default 0x80000 if ARCH_OMAP2PLUS || ARCH_SUNXI
+ help
+ When non-zero, the linker checks that the actual memory used by SPL
+ from __bss_start to __bss_end does not exceed it.
+
+config SPL_MAX_FOOTPRINT
+ hex "Maximum size in memory allocated to the SPL, BSS included"
+ depends on SPL_FOOTPRINT_LIMIT
+ help
+ When non-zero, the linker checks that the actual memory used by SPL
+ from _start to __bss_end does not exceed it.
+
config SPL_SYS_STACK_F_CHECK_BYTE
hex
default 0xaa
Create boot binary having SPL binary in PBI format concatenated with
u-boot binary.
+config SPL_SYS_CCSR_DO_NOT_RELOCATE
+ bool "Ensures that CCSR is not relocated"
+ depends on PPC
+ help
+ If this is defined, then CONFIG_SYS_CCSRBAR_PHYS will be forced to a
+ value that ensures that CCSR is not relocated.
+
+config TPL_SYS_CCSR_DO_NOT_RELOCATE
+ def_bool y
+ depends on SPL_SYS_CCSR_DO_NOT_RELOCATE
+
+endmenu
+
+menu "PowerPC SPL / TPL specific options"
+ depends on PPC && (SPL && !SPL_FRAMEWORK)
+
+config SPL_INIT_MINIMAL
+ bool "Arch init code will be built for a very small image"
+
+config SPL_FLUSH_IMAGE
+ bool "Clean dcache and invalidate icache after loading the image"
+
+config SPL_SKIP_RELOCATE
+ bool "Skip relocating SPL"
+
+config SPL_RELOC_TEXT_BASE
+ hex "Address to relocate SPL to"
+ default SPL_TEXT_BASE
+ help
+ If unspecified, this is equal to CONFIG_SPL_TEXT_BASE (i.e. no
+ relocation is done).
+
+config SPL_RELOC_STACK
+ hex "Address of the start of the stack SPL will use after relocation."
+ help
+ If unspecified, this is equal to CONFIG_SYS_SPL_MALLOC_START. Starting
+ address of the malloc pool used in SPL. When this option is set the full
+ malloc is used in SPL and it is set up by spl_init() and before that, the
+ simple malloc() can be used if CONFIG_SYS_MALLOC_F is defined.
+
+config SPL_RELOC_MALLOC
+ bool "SPL has malloc pool after relocation"
+
+config SPL_RELOC_MALLOC_ADDR
+ hex "Address of malloc pool in SPL"
+ depends on SPL_RELOC_MALLOC
+
+config SPL_RELOC_MALLOC_SIZE
+ hex "Size of malloc pool in SPL"
+ depends on SPL_RELOC_MALLOC
+
+config TPL_RELOC_TEXT_BASE
+ hex "Address to relocate TPL to"
+ depends on TPL
+ default TPL_TEXT_BASE
+ help
+ If unspecified, this is equal to CONFIG_TPL_TEXT_BASE (i.e. no
+ relocation is done).
+
+config TPL_RELOC_STACK
+ hex "Address of the start of the stack TPL will use after relocation."
+ depends on TPL
+ help
+ If unspecified, this is equal to CONFIG_SYS_TPL_MALLOC_START. Starting
+ address of the malloc pool used in TPL. When this option is set the full
+ malloc is used in TPL and it is set up by spl_init() and before that, the
+ simple malloc() can be used if CONFIG_SYS_MALLOC_F is defined.
+
+config TPL_RELOC_MALLOC
+ bool "TPL has malloc pool after relocation"
+ depends on TPL
+
+config TPL_RELOC_MALLOC_ADDR
+ hex "Address of malloc pool in TPL"
+ depends on TPL_RELOC_MALLOC
+
+config TPL_RELOC_MALLOC_SIZE
+ hex "Size of malloc pool in TPL"
+ depends on TPL_RELOC_MALLOC
+
endmenu
config HANDOFF
config SPL_RAW_IMAGE_SUPPORT
bool "Support SPL loading and booting of RAW images"
default n if (ARCH_MX6 && (SPL_MMC || SPL_SATA))
- default y if !TI_SECURE_DEVICE
+ default y
+ depends on !TI_SECURE_DEVICE
help
SPL will support loading and booting a RAW image when this option
is y. If this is not set, SPL will move on to other available
config SPL_LEGACY_IMAGE_FORMAT
bool "Support SPL loading and booting of Legacy images"
- default y if !TI_SECURE_DEVICE && !SPL_LOAD_FIT
+ default y if !SPL_LOAD_FIT
+ depends on !TI_SECURE_DEVICE
help
SPL will support loading and booting Legacy images when this option
is y. If this is not set, SPL will move on to other available
this will make the TPL binary smaller at the cost of more heap
usage as the *_simple malloc functions do not re-use free-ed mem.
+config SPL_SHARES_INIT_SP_ADDR
+ bool "SPL and U-Boot use the same initial stack pointer location"
+ depends on (ARM || ARCH_JZ47XX || MICROBLAZE || RISCV) && SPL_FRAMEWORK
+ default n if ARCH_SUNXI || ARCH_MX6 || ARCH_MX7
+ default y
+ help
+ In many cases, we can use the same initial stack pointer address for
+ both SPL and U-Boot itself. If you need to specify a different address
+ however, say N here and then set a different value in CONFIG_SPL_STACK.
+
+config SPL_STACK
+ hex "Initial stack pointer location"
+ depends on (ARM || ARCH_JZ47XX || MICROBLAZE || RISCV) && SPL_FRAMEWORK
+ depends on !SPL_SHARES_INIT_SP_ADDR
+ default 0x946bb8 if ARCH_MX7
+ default 0x93ffb8 if ARCH_MX6 && MX6_OCRAM_256KB
+ default 0x91ffb8 if ARCH_MX6 && !MX6_OCRAM_256KB
+ help
+ Address of the start of the stack SPL will use before SDRAM is
+ initialized.
+
config SPL_STACK_R
bool "Enable SDRAM location for SPL stack"
help
location is used. Normally we put the device tree at the end of BSS
but with this option enabled, it goes at _image_binary_end.
+config SYS_SPL_MALLOC
+ bool "Enable malloc pool in SPL"
+ depends on SPL_FRAMEWORK
+
+config HAS_CUSTOM_SPL_MALLOC_START
+ bool "For the SPL malloc pool, define a custom starting address"
+ depends on SYS_SPL_MALLOC
+
+config CUSTOM_SYS_SPL_MALLOC_ADDR
+ hex "SPL malloc addr"
+ depends on HAS_CUSTOM_SPL_MALLOC_START
+
+config SYS_SPL_MALLOC_SIZE
+ hex "Size of the SPL malloc pool"
+ depends on SYS_SPL_MALLOC
+ default 0x100000
+
config SPL_READ_ONLY
bool
depends on SPL_OF_PLATDATA
filesystem from within SPL. Support for the underlying block
device (e.g. MMC or USB) must be enabled separately.
+config SPL_FS_LOAD_PAYLOAD_NAME
+ string "File to load for U-Boot from the filesystem"
+ depends on SPL_FS_EXT4 || SPL_FS_FAT || SPL_FS_SQUASHFS
+ default "tispl.bin" if SYS_K3_SPL_ATF
+ default "u-boot.itb" if SPL_LOAD_FIT
+ default "u-boot.img"
+ help
+ Filename to read to load U-Boot when reading from filesystem.
+
+config SPL_FS_LOAD_KERNEL_NAME
+ string "File to load for the OS kernel from the filesystem"
+ depends on (SPL_FS_EXT4 || SPL_FS_FAT || SPL_FS_SQUASHFS) && SPL_OS_BOOT
+ default "uImage"
+ help
+ Filename to read to load for the OS kernel when reading from the
+ filesystem.
+
+config SPL_FS_LOAD_ARGS_NAME
+ string "File to load for the OS kernel argument parameters from the filesystem"
+ depends on (SPL_FS_EXT4 || SPL_FS_FAT || SPL_FS_SQUASHFS) && SPL_OS_BOOT
+ default "args"
+ help
+ Filename to read to load for the OS kernel argument parameters from
+ the filesystem.
+
config SPL_FAT_WRITE
bool "Support write for FAT filesystems"
help
This enables the drivers in drivers/mtd/nand/raw as part of an SPL
build.
+config SPL_NAND_RAW_ONLY
+ bool "Support to boot only raw u-boot.bin images"
+ depends on SPL_NAND_SUPPORT
+ help
+ Use this only if you need to save space.
+
config SPL_NAND_DRIVERS
bool "Use standard NAND driver"
help
SPL uses normal NAND drivers, not minimal drivers.
config SPL_NAND_ECC
- bool "Include standard software ECC in the SPL"
+ bool "Include standard ECC in SPL"
+
+config SPL_NAND_SOFTECC
+ bool "Use software ECC in SPL"
+ depends on SPL_NAND_ECC
config SPL_NAND_SIMPLE
bool "Support simple NAND drivers in SPL"
The base address for the .text section of the TPL stage.
config TPL_MAX_SIZE
- int "Maximum size (in bytes) for the TPL stage"
- default 0
- depends on TPL
+ hex "Maximum size (in bytes) for the TPL stage"
+ default 0x2e000 if ROCKCHIP_RK3399
+ default 0x8000 if ROCKCHIP_RK3288
+ default 0x7000 if ROCKCHIP_RK322X || ROCKCHIP_RK3328 || ROCKCHIP_RK3368
+ default 0x2800 if ROCKCHIP_PX30
+ default 0x0
help
The maximum size (in bytes) of the TPL stage.
+config TPL_PAD_TO
+ hex "Offset to which the TPL should be padded before appending the TPL payload"
+ depends on !TPL_FRAMEWORK && PPC
+ default TPL_MAX_SIZE
+ help
+ Image offset to which the TPL should be padded before appending the
+ TPL payload. By default, this is defined as CONFIG_TPL_MAX_SIZE, or 0 if
+ CONFIG_TPL_MAX_SIZE is undefined. CONFIG_TPL_PAD_TO must be either
+ 0, meaning to append the TPL payload without any padding, or >=
+ CONFIG_TPL_MAX_SIZE.
+
config TPL_STACK
hex "Address of the initial stack-pointer for the TPL stage"
depends on TPL_NEEDS_SEPARATE_STACK
projects / platform / kernel / u-boot.git / blobdiff