#include <common.h>
#include <bloblist.h>
+#include <bootstage.h>
#include <clock_legacy.h>
#include <console.h>
#include <cpu.h>
#include <init.h>
#include <initcall.h>
#include <lcd.h>
+#include <log.h>
#include <malloc.h>
#include <mapmem.h>
#include <os.h>
#include <trace.h>
#include <video.h>
#include <watchdog.h>
+#include <asm/cache.h>
#ifdef CONFIG_MACH_TYPE
#include <asm/mach-types.h>
#endif
static int show_dram_config(void)
{
unsigned long long size;
-
-#ifdef CONFIG_NR_DRAM_BANKS
int i;
debug("\nRAM Configuration:\n");
#endif
}
debug("\nDRAM: ");
-#else
- size = gd->ram_size;
-#endif
print_size(size, "");
board_add_ram_info(0);
__weak int dram_init_banksize(void)
{
-#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
- gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].start = gd->ram_base;
gd->bd->bi_dram[0].size = get_effective_memsize();
-#endif
return 0;
}
static int init_func_i2c(void)
{
puts("I2C: ");
-#ifdef CONFIG_SYS_I2C
i2c_init_all();
-#else
- i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-#endif
puts("ready\n");
return 0;
}
/* Get the top of usable RAM */
__weak ulong board_get_usable_ram_top(ulong total_size)
{
-#ifdef CONFIG_SYS_SDRAM_BASE
+#if defined(CONFIG_SYS_SDRAM_BASE) && CONFIG_SYS_SDRAM_BASE > 0
/*
* Detect whether we have so much RAM that it goes past the end of our
* 32-bit address space. If so, clip the usable RAM so it doesn't.
ret = video_reserve(&addr);
if (ret)
return ret;
+ debug("Reserving %luk for video at: %08lx\n",
+ (unsigned long)gd->relocaddr - addr, addr);
gd->relocaddr = addr;
#elif defined(CONFIG_LCD)
# ifdef CONFIG_FB_ADDR
static int reserve_board(void)
{
if (!gd->bd) {
- gd->start_addr_sp = reserve_stack_aligned(sizeof(bd_t));
- gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
- memset(gd->bd, '\0', sizeof(bd_t));
+ gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
+ gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
+ sizeof(struct bd_info));
+ memset(gd->bd, '\0', sizeof(struct bd_info));
debug("Reserving %zu Bytes for Board Info at: %08lx\n",
- sizeof(bd_t), gd->start_addr_sp);
+ sizeof(struct bd_info), gd->start_addr_sp);
}
return 0;
}
* will be relocated with other data.
*/
if (gd->fdt_blob) {
- gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
+ gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
static int reserve_bloblist(void)
{
#ifdef CONFIG_BLOBLIST
- gd->start_addr_sp = reserve_stack_aligned(CONFIG_BLOBLIST_SIZE);
+ /* Align to a 4KB boundary for easier reading of addresses */
+ gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp - CONFIG_BLOBLIST_SIZE,
+ 0x1000);
gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE);
#endif
return 0;
}
-#if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
- defined(CONFIG_SH)
-static int setup_board_part1(void)
+__weak int arch_setup_bdinfo(void)
{
- bd_t *bd = gd->bd;
-
- /*
- * Save local variables to board info struct
- */
- bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
- bd->bi_memsize = gd->ram_size; /* size in bytes */
-
-#ifdef CONFIG_SYS_SRAM_BASE
- bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
- bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
-#endif
-
-#if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
- bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
-#endif
-#if defined(CONFIG_M68K)
- bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
-#endif
-#if defined(CONFIG_MPC83xx)
- bd->bi_immrbar = CONFIG_SYS_IMMR;
-#endif
-
return 0;
}
-#endif
-#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
-static int setup_board_part2(void)
+int setup_bdinfo(void)
{
- bd_t *bd = gd->bd;
-
- bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
- bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
-#if defined(CONFIG_CPM2)
- bd->bi_cpmfreq = gd->arch.cpm_clk;
- bd->bi_brgfreq = gd->arch.brg_clk;
- bd->bi_sccfreq = gd->arch.scc_clk;
- bd->bi_vco = gd->arch.vco_out;
-#endif /* CONFIG_CPM2 */
-#if defined(CONFIG_M68K) && defined(CONFIG_PCI)
- bd->bi_pcifreq = gd->pci_clk;
-#endif
-#if defined(CONFIG_EXTRA_CLOCK)
- bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
- bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
- bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
-#endif
+ struct bd_info *bd = gd->bd;
- return 0;
+ if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
+ bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
+ bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
+ }
+
+ return arch_setup_bdinfo();
}
-#endif
#ifdef CONFIG_POST
static int init_post(void)
if (gd->flags & GD_FLG_SKIP_RELOC)
return 0;
if (gd->new_fdt) {
- memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
+ memcpy(gd->new_fdt, gd->fdt_blob, fdt_totalsize(gd->fdt_blob));
gd->fdt_blob = gd->new_fdt;
}
#endif
#if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
int ret;
- bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
+ bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
ret = dm_init_and_scan(true);
- bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
+ bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
if (ret)
return ret;
#endif
* - board info struct
*/
setup_dest_addr,
+#ifdef CONFIG_OF_BOARD_FIXUP
+ fix_fdt,
+#endif
#ifdef CONFIG_PRAM
reserve_pram,
#endif
reserve_stacks,
dram_init_banksize,
show_dram_config,
-#if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
- defined(CONFIG_SH)
- setup_board_part1,
-#endif
-#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
INIT_FUNC_WATCHDOG_RESET
- setup_board_part2,
-#endif
+ setup_bdinfo,
display_new_sp,
-#ifdef CONFIG_OF_BOARD_FIXUP
- fix_fdt,
-#endif
INIT_FUNC_WATCHDOG_RESET
reloc_fdt,
reloc_bootstage,
projects / platform / kernel / u-boot.git / blobdiff