/*
* Configure CPC0_PCI to enable PerWE as output
*/
- mtdcr(cpc0_pci, CPC0_PCI_SPE);
+ mtdcr(CPC0_PCI, CPC0_PCI_SPE);
return 0;
}
/* Re-do sizing to get full correct info */
/* adjust flash start and offset */
- mfebc(pb0cr, pbcr);
+ mfebc(PB0CR, pbcr);
switch (gd->bd->bi_flashsize) {
case 1 << 20:
size_val = 0;
break;
}
pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
- mtebc(pb0cr, pbcr);
+ mtebc(PB0CR, pbcr);
/*
* Re-check to get correct base address
U_BOOT_CMD(
setdef, 4, 1, do_set_default,
"write board-specific values to EEPROM (ethaddr...)",
- "ethaddr eth1addr serial#\n - write board-specific values to EEPROM\n"
+ "ethaddr eth1addr serial#\n - write board-specific values to EEPROM"
);
static inline int sw_reset_pressed(void)
U_BOOT_CMD (
chkreset, 1, 1, do_chkreset,
"Check for status of SW-reset button and act accordingly",
- NULL
+ ""
);
#if defined(CONFIG_POST)