#include <common.h>
#include <netdev.h>
+#include <ahci.h>
+#include <scsi.h>
+#include <asm/arch/clk.h>
#include <asm/arch/hardware.h>
#include <asm/arch/sys_proto.h>
#include <asm/io.h>
+#include <usb.h>
+#include <dwc3-uboot.h>
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
+ printf("EL Level:\tEL%d\n", current_el());
+
return 0;
}
{
u32 val;
- val = readl(&crlapb_base->timestamp_ref_ctrl);
- val |= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT;
- writel(val, &crlapb_base->timestamp_ref_ctrl);
-
+ if (current_el() == 3) {
+ val = readl(&crlapb_base->timestamp_ref_ctrl);
+ val |= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT;
+ writel(val, &crlapb_base->timestamp_ref_ctrl);
+
+ /* Program freq register in System counter */
+ writel(zynqmp_get_system_timer_freq(),
+ &iou_scntr_secure->base_frequency_id_register);
+ /* And enable system counter */
+ writel(ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN,
+ &iou_scntr_secure->counter_control_register);
+ }
/* Program freq register in System counter and enable system counter */
writel(gd->cpu_clk, &iou_scntr->base_frequency_id_register);
writel(ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG |
{
}
-#ifdef CONFIG_CMD_MMC
-int board_mmc_init(bd_t *bd)
+#ifdef CONFIG_SCSI_AHCI_PLAT
+void scsi_init(void)
{
- int ret = 0;
-
-#if defined(CONFIG_ZYNQ_SDHCI)
-# if defined(CONFIG_ZYNQ_SDHCI0)
- ret = zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0);
-# endif
-# if defined(CONFIG_ZYNQ_SDHCI1)
- ret |= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1);
-# endif
-#endif
-
- return ret;
+ ahci_init((void __iomem *)ZYNQMP_SATA_BASEADDR);
+ scsi_scan(1);
}
#endif
bootmode = reg & BOOT_MODES_MASK;
switch (bootmode) {
+ case JTAG_MODE:
+ setenv("modeboot", "netboot");
+ break;
+ case QSPI_MODE_24BIT:
+ case QSPI_MODE_32BIT:
+ setenv("modeboot", "qspiboot");
+ break;
case SD_MODE:
+ case EMMC_MODE:
setenv("modeboot", "sdboot");
break;
+ case SD_MODE1:
+ setenv("modeboot", "sdboot1");
+ break;
+ case NAND_MODE:
+ setenv("modeboot", "nandboot");
+ break;
default:
printf("Invalid Boot Mode:0x%x\n", bootmode);
break;
return 0;
}
+
+int checkboard(void)
+{
+ puts("Board:\tXilinx ZynqMP\n");
+ return 0;
+}
+
+#ifdef CONFIG_USB_DWC3
+static struct dwc3_device dwc3_device_data = {
+ .maximum_speed = USB_SPEED_HIGH,
+ .base = ZYNQMP_USB0_XHCI_BASEADDR,
+ .dr_mode = USB_DR_MODE_PERIPHERAL,
+ .index = 0,
+};
+
+int usb_gadget_handle_interrupts(void)
+{
+ dwc3_uboot_handle_interrupt(0);
+ return 0;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+ return dwc3_uboot_init(&dwc3_device_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+ dwc3_uboot_exit(index);
+ return 0;
+}
+#endif