Merge branch 'master' of git://git.denx.de/u-boot-samsung
[platform/kernel/u-boot.git] / board / xilinx / zynqmp / zynqmp.c
index 9136c46..51a3d9f 100644 (file)
@@ -113,6 +113,14 @@ static char *zynqmp_get_silicon_idcode_name(void)
 }
 #endif
 
+int board_early_init_f(void)
+{
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_CLK_ZYNQMP)
+       zynqmp_pmufw_version();
+#endif
+       return 0;
+}
+
 #define ZYNQMP_VERSION_SIZE    9
 
 int board_init(void)
@@ -180,76 +188,20 @@ int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
 }
 
 #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
-static const void *get_memory_reg_prop(const void *fdt, int *lenp)
+int dram_init_banksize(void)
 {
-       int offset;
-
-       offset = fdt_path_offset(fdt, "/memory");
-       if (offset < 0)
-               return NULL;
+       fdtdec_setup_memory_banksize();
 
-       return fdt_getprop(fdt, offset, "reg", lenp);
+       return 0;
 }
 
 int dram_init(void)
 {
-       const void *fdt = gd->fdt_blob;
-       const fdt32_t *val;
-       int ac, sc, len;
-
-       ac = fdt_address_cells(fdt, 0);
-       sc = fdt_size_cells(fdt, 0);
-       if (ac < 0 || sc < 1 || sc > 2) {
-               printf("invalid address/size cells\n");
+       if (fdtdec_setup_memory_size() != 0)
                return -EINVAL;
-       }
-
-       val = get_memory_reg_prop(fdt, &len);
-       if (len / sizeof(*val) < ac + sc)
-               return -EINVAL;
-
-       val += ac;
-
-       gd->ram_size = fdtdec_get_number(val, sc);
-
-       debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size);
 
        return 0;
 }
-
-void dram_init_banksize(void)
-{
-       const void *fdt = gd->fdt_blob;
-       const fdt32_t *val;
-       int ac, sc, cells, len, i;
-
-       val = get_memory_reg_prop(fdt, &len);
-       if (len < 0)
-               return;
-
-       ac = fdt_address_cells(fdt, 0);
-       sc = fdt_size_cells(fdt, 0);
-       if (ac < 1 || sc > 2 || sc < 1 || sc > 2) {
-               printf("invalid address/size cells\n");
-               return;
-       }
-
-       cells = ac + sc;
-
-       len /= sizeof(*val);
-
-       for (i = 0; i < CONFIG_NR_DRAM_BANKS && len >= cells;
-            i++, len -= cells) {
-               gd->bd->bi_dram[i].start = fdtdec_get_number(val, ac);
-               val += ac;
-               gd->bd->bi_dram[i].size = fdtdec_get_number(val, sc);
-               val += sc;
-
-               debug("DRAM bank %d: start = %08lx, size = %08lx\n",
-                     i, (unsigned long)gd->bd->bi_dram[i].start,
-                     (unsigned long)gd->bd->bi_dram[i].size);
-       }
-}
 #else
 int dram_init(void)
 {