drivers, block: remove sil680 driver
[platform/kernel/u-boot.git] / board / xilinx / ppc440-generic / xilinx_ppc440_generic.c
index 0c3d667..07a3ab7 100644 (file)
@@ -1,52 +1,62 @@
 /*
  * (C) Copyright 2008
- * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
+ * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@gmail.com
  * This work has been supported by: QTechnology  http://qtec.com/
  *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ * SPDX-License-Identifier:    GPL-2.0+
 */
 
 #include <config.h>
 #include <common.h>
+#include <netdev.h>
 #include <asm/processor.h>
 
-int __board_pre_init(void)
-{
-       return 0;
-}
-int board_pre_init(void) __attribute__((weak, alias("__board_pre_init")));
+DECLARE_GLOBAL_DATA_PTR;
 
-int __checkboard(void)
+int checkboard(void)
 {
        puts("Xilinx PPC440 Generic Board\n");
        return 0;
 }
-int checkboard(void) __attribute__((weak, alias("__checkboard")));
 
-phys_size_t __initdram(int board_type)
+int dram_init(void)
 {
-       return get_ram_size(XPAR_DDR2_SDRAM_MEM_BASEADDR,
+       gd->ram_size = get_ram_size(XPAR_DDR2_SDRAM_MEM_BASEADDR,
                            CONFIG_SYS_SDRAM_SIZE_MB * 1024 * 1024);
+
+       return 0;
 }
-phys_size_t initdram(int) __attribute__((weak, alias("__initdram")));
 
-void __get_sys_info(sys_info_t *sysInfo)
+void get_sys_info(sys_info_t *sys_info)
 {
-       sysInfo->freqProcessor = XPAR_CORE_CLOCK_FREQ_HZ;
-       sysInfo->freqPLB = XPAR_PLB_CLOCK_FREQ_HZ;
-       sysInfo->freqPCI = 0;
+       sys_info->freqProcessor = XPAR_CORE_CLOCK_FREQ_HZ;
+       sys_info->freqPLB = XPAR_PLB_CLOCK_FREQ_HZ;
+       sys_info->freqPCI = 0;
 
        return;
 }
-void get_sys_info(sys_info_t *) __attribute__((weak, alias("__get_sys_info")));
+
+int get_serial_clock(void){
+       return XPAR_UARTNS550_0_CLOCK_FREQ_HZ;
+}
+
+int board_eth_init(bd_t *bis)
+{
+       int ret = 0;
+
+       puts("Init xilinx temac\n");
+#ifdef XPAR_LLTEMAC_0_BASEADDR
+       ret |= xilinx_ll_temac_eth_init(bis, XPAR_LLTEMAC_0_BASEADDR,
+                       XILINX_LL_TEMAC_M_SDMA_DCR | XILINX_LL_TEMAC_M_SDMA_PLB,
+                       XPAR_LLTEMAC_0_LLINK_CONNECTED_BASEADDR);
+
+#endif
+
+#ifdef XPAR_LLTEMAC_1_BASEADDR
+       ret |= xilinx_ll_temac_eth_init(bis, XPAR_LLTEMAC_1_BASEADDR,
+                       XILINX_LL_TEMAC_M_SDMA_DCR | XILINX_LL_TEMAC_M_SDMA_PLB,
+                       XPAR_LLTEMAC_1_LLINK_CONNECTED_BASEADDR);
+#endif
+
+       return ret;
+}