#include <watchdog.h>
unsigned long get_dram_size (void);
+void sdram_init(void);
/*
* Macros to transform values
/*
* Setup GPIO pins - reset devices.
*/
- out32 (IBM405GP_GPIO0_ODR, 0x10000000); /* one open drain pin */
- out32 (IBM405GP_GPIO0_OR, 0x3E000000); /* set output pins to default */
- out32 (IBM405GP_GPIO0_TCR, 0x7f800000); /* setup for output */
+ out32 (PPC405GP_GPIO0_ODR, 0x10000000); /* one open drain pin */
+ out32 (PPC405GP_GPIO0_OR, 0x3E000000); /* set output pins to default */
+ out32 (PPC405GP_GPIO0_TCR, 0x7f800000); /* setup for output */
/*
* IRQ 0-15 405GP internally generated; active high; level sensitive
/*
* Setup GPIO pins
*/
- out32 (IBM405GP_GPIO0_ODR, 0x01800000); /* XCV Done Open Drain */
- out32 (IBM405GP_GPIO0_OR, 0x03800000); /* set out pins to default */
- out32 (IBM405GP_GPIO0_TCR, 0x66C00000); /* setup for output */
+ out32 (PPC405GP_GPIO0_ODR, 0x01800000); /* XCV Done Open Drain */
+ out32 (PPC405GP_GPIO0_OR, 0x03800000); /* set out pins to default */
+ out32 (PPC405GP_GPIO0_TCR, 0x66C00000); /* setup for output */
/*
* IRQ 0-15 405GP internally generated; active high; level sensitive
puts ("Board: ");
/* VPD data present in I2C EEPROM */
- if (vpd_get_data (CFG_DEF_EEPROM_ADDR, &vpd) == 0) {
+ if (vpd_get_data (CONFIG_SYS_DEF_EEPROM_ADDR, &vpd) == 0) {
/*
* Known board type.
*/
/* ------------------------------------------------------------------------- */
-long int initdram (int board_type)
+phys_size_t initdram (int board_type)
{
+ /*
+ * ToDo: Move the asm init routine sdram_init() to this C file,
+ * or even better use some common ppc4xx code available
+ * in cpu/ppc4xx
+ */
+ sdram_init();
+
return get_dram_size ();
}
int size = 0;
/* Get bank Size registers */
- mtdcr (memcfga, mem_mb0cf); /* get bank 0 config reg */
- regs[0] = mfdcr (memcfgd);
+ mtdcr (SDRAM0_CFGADDR, mem_mb0cf); /* get bank 0 config reg */
+ regs[0] = mfdcr (SDRAM0_CFGDATA);
- mtdcr (memcfga, mem_mb1cf); /* get bank 1 config reg */
- regs[1] = mfdcr (memcfgd);
+ mtdcr (SDRAM0_CFGADDR, mem_mb1cf); /* get bank 1 config reg */
+ regs[1] = mfdcr (SDRAM0_CFGDATA);
- mtdcr (memcfga, mem_mb2cf); /* get bank 2 config reg */
- regs[2] = mfdcr (memcfgd);
+ mtdcr (SDRAM0_CFGADDR, mem_mb2cf); /* get bank 2 config reg */
+ regs[2] = mfdcr (SDRAM0_CFGDATA);
- mtdcr (memcfga, mem_mb3cf); /* get bank 3 config reg */
- regs[3] = mfdcr (memcfgd);
+ mtdcr (SDRAM0_CFGADDR, mem_mb3cf); /* get bank 3 config reg */
+ regs[3] = mfdcr (SDRAM0_CFGDATA);
/* compute the size, add each bank if enabled */
for (i = 0; i < 4; i++) {
/*
* Read VPD
*/
- if (vpd_get_data (CFG_DEF_EEPROM_ADDR, vpd) != 0)
+ if (vpd_get_data (CONFIG_SYS_DEF_EEPROM_ADDR, vpd) != 0)
return;
/*
(strncmp (vpd->productId, "CMM", 3) == 0))) {
char buf[30];
char *eth;
- unsigned char *serial = getenv ("serial#");
- unsigned char *ethaddr = getenv ("ethaddr");
+ char *serial = getenv ("serial#");
+ char *ethaddr = getenv ("ethaddr");
/* Set 'serial#' envvar if serial# isn't set */
if (!serial) {
}
/* Set 'ethaddr' envvar if 'ethaddr' envvar is the default */
- eth = vpd->ethAddrs[0];
+ eth = (char *)(vpd->ethAddrs[0]);
if (ethaddr
&& (strcmp (ethaddr, MK_STR (CONFIG_ETHADDR)) == 0)) {
/* Now setup ethaddr */
#if defined(CONFIG_W7OLMG)
unsigned long greg; /* GPIO Register */
- greg = in32 (IBM405GP_GPIO0_OR);
+ greg = in32 (PPC405GP_GPIO0_OR);
/*
* XXX - Unreset devices - this should be moved into VxWorks driver code
*/
greg |= 0x41800000L; /* SAM, PHY, Galileo */
- out32 (IBM405GP_GPIO0_OR, greg); /* set output pins to default */
+ out32 (PPC405GP_GPIO0_OR, greg); /* set output pins to default */
#endif /* CONFIG_W7OLMG */
/*