Merge branch 'next' of git://git.denx.de/u-boot-avr32

[platform/kernel/u-boot.git] / board / tqc / tqm8272 / tqm8272.c

diff --git a/board/tqc/tqm8272/tqm8272.c b/board/tqc/tqm8272/tqm8272.c
index ec1a37c..a0ec254 100644 (file)
--- a/board/tqc/tqm8272/tqm8272.c
+++ b/board/tqc/tqm8272/tqm8272.c
@@ -555,7 +555,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
        return (size);
 }
 
-long int initdram (int board_type)
+phys_size_t initdram (int board_type)
 {
        volatile immap_t *immap = (immap_t *) CFG_IMMR;
        volatile memctl8260_t *memctl = &immap->im_memctl;
@@ -652,7 +652,7 @@ static int dump_hwib(void)
                printf ("ethaddr: %s\n", hw->ethaddr);
                printf ("FLASH  : %x nr:%d\n", hw->flash, hw->flash_nr);
                printf ("RAM    : %x cs:%d\n", hw->ram, hw->ram_cs);
-               printf ("CPU    : %d\n", hw->cpunr);
+               printf ("CPU    : %lu\n", hw->cpunr);
                printf ("CAN    : %d\n", hw->can);
                if (hw->eeprom) printf ("EEprom : %x\n", hw->eeprom);
                else printf ("No EEprom\n");
@@ -663,7 +663,7 @@ static int dump_hwib(void)
                printf ("Bus %s mode.\n", (hw->Bus ? "60x" : "Single PQII"));
                printf ("  real : %s\n", (immr->im_siu_conf.sc_bcr & BCR_EBM ? \
                                 "60x" : "Single PQII"));
-               printf ("Option : %x\n", hw->option);
+               printf ("Option : %lx\n", hw->option);
                printf ("%s Security Engine\n", (hw->SecEng ? "with" : "no"));
                printf ("CPM Clk: %d\n", hw->cpmcl);
                printf ("CPU Clk: %d\n", hw->cpucl);
@@ -1068,24 +1068,22 @@ int update_flash_size (int flash_size)
 
 static u8 hwctl = 0;
 
-static void upmnand_hwcontrol(struct mtd_info *mtdinfo, int cmd)
+static void upmnand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
 {
-       switch (cmd) {
-       case NAND_CTL_SETCLE:
-               hwctl |= 0x1;
-               break;
-       case NAND_CTL_CLRCLE:
-               hwctl &= ~0x1;
-               break;
-
-       case NAND_CTL_SETALE:
-               hwctl |= 0x2;
-               break;
-
-       case NAND_CTL_CLRALE:
-               hwctl &= ~0x2;
-               break;
+       struct nand_chip *this = mtd->priv;
+
+       if (ctrl & NAND_CTRL_CHANGE) {
+               if ( ctrl & NAND_CLE )
+                       hwctl |= 0x1;
+               else
+                       hwctl &= ~0x1;
+               if ( ctrl & NAND_ALE )
+                       hwctl |= 0x2;
+               else
+                       hwctl &= ~0x2;
        }
+       if (cmd != NAND_CMD_NONE)
+               writeb(cmd, this->IO_ADDR_W);
 }
 
 static void upmnand_write_byte(struct mtd_info *mtdinfo, u_char byte)
@@ -1188,9 +1186,9 @@ int board_nand_init(struct nand_chip *nand)
        memctl->memc_br3 = CFG_NAND_BR;
        memctl->memc_mbmr = (MxMR_OP_NORM);
 
-       nand->eccmode = NAND_ECC_SOFT;
+       nand->ecc.mode = NAND_ECC_SOFT;
 
-       nand->hwcontrol  = upmnand_hwcontrol;
+       nand->cmd_ctrl   = upmnand_hwcontrol;
        nand->read_byte  = upmnand_read_byte;
        nand->write_byte = upmnand_write_byte;
        nand->dev_ready  = tqm8272_dev_ready;