#include <dm.h>
#include <env.h>
#include <errno.h>
+#include <image.h>
+#include <init.h>
+#include <malloc.h>
+#include <net.h>
#include <spl.h>
#include <serial.h>
#include <asm/arch/cpu.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/mem.h>
+#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/emif.h>
#include <asm/gpio.h>
#include <i2c.h>
#include <miiphy.h>
#include <cpsw.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
#include <power/tps65217.h>
#include <power/tps65910.h>
#include <env_internal.h>
#include <watchdog.h>
#include "../common/board_detect.h"
+#include "../common/cape_detect.h"
#include "board.h"
DECLARE_GLOBAL_DATA_PTR;
void do_board_detect(void)
{
enable_i2c0_pin_mux();
-#ifndef CONFIG_DM_I2C
+ enable_i2c2_pin_mux();
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
+ i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED2, CONFIG_SYS_OMAP24_I2C_SLAVE2);
#endif
if (ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS,
CONFIG_EEPROM_CHIP_ADDRESS))
if (board_is_bone() && !strncmp(board_ti_get_rev(), "00A1", 4))
return;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
if (i2c_probe(TPS65217_CHIP_PM))
return;
#else
* 1.10V. For MPU voltage we need to switch based on
* the frequency we are running at.
*/
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
if (i2c_probe(TPS65910_CTRL_I2C_ADDR))
return;
#else
if (first_time) {
enable_i2c0_pin_mux();
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED,
CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
#endif
#if defined(CONFIG_CLOCK_SYNTHESIZER) && (!defined(CONFIG_SPL_BUILD) || \
- (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)))
+ (defined(CONFIG_SPL_ETH) && defined(CONFIG_SPL_BUILD)))
static void request_and_set_gpio(int gpio, char *name, int val)
{
int ret;
#define MAX_CPSW_SLAVES 2
/* At the moment, we do not want to stop booting for any failures here */
-int ft_board_setup(void *fdt, bd_t *bd)
+int ft_board_setup(void *fdt, struct bd_info *bd)
{
const char *slave_path, *enet_name;
int enetnode, slavenode, phynode;
#endif
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
+#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
gpmc_init();
#endif
#if defined(CONFIG_CLOCK_SYNTHESIZER) && (!defined(CONFIG_SPL_BUILD) || \
- (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)))
+ (defined(CONFIG_SPL_ETH) && defined(CONFIG_SPL_BUILD)))
if (board_is_icev2()) {
int rv;
u32 reg;
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
+ struct udevice *dev;
#if !defined(CONFIG_SPL_BUILD)
uint8_t mac_addr[6];
uint32_t mac_hi, mac_lo;
env_set("serial#", board_serial);
}
+ /* Just probe the potentially supported cdce913 device */
+ uclass_get_device_by_name(UCLASS_CLK, "cdce913@65", &dev);
+
return 0;
}
#endif
-/* CPSW platdata */
+/* CPSW plat */
#if !CONFIG_IS_ENABLED(OF_CONTROL)
struct cpsw_slave_data slave_data[] = {
{
.slaves = 2,
.slave_data = slave_data,
.ale_entries = 1024,
- .bd_ram_ofs = 0x2000,
.mac_control = 0x20,
.active_slave = 0,
.mdio_base = 0x4a101000,
.priv_pdata = &am335_eth_data,
};
-U_BOOT_DEVICE(am335x_eth) = {
+U_BOOT_DRVINFO(am335x_eth) = {
.name = "eth_cpsw",
- .platdata = &cpsw_pdata,
+ .plat = &cpsw_pdata,
};
#endif
return 0;
else if (board_is_icev2() && !strcmp(name, "am335x-icev2"))
return 0;
+ else if (board_is_bben() && !strcmp(name, "am335x-sancloud-bbe"))
+ return 0;
else
return -1;
}
#endif
#ifdef CONFIG_TI_SECURE_DEVICE
-void board_fit_image_post_process(void **p_image, size_t *p_size)
+void board_fit_image_post_process(const void *fit, int node, void **p_image,
+ size_t *p_size)
{
secure_boot_verify_image(p_image, p_size);
}
#endif
#if !CONFIG_IS_ENABLED(OF_CONTROL)
-static const struct omap_hsmmc_plat am335x_mmc0_platdata = {
+static const struct omap_hsmmc_plat am335x_mmc0_plat = {
.base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE,
.cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_4BIT,
.cfg.f_min = 400000,
.cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,
};
-U_BOOT_DEVICE(am335x_mmc0) = {
+U_BOOT_DRVINFO(am335x_mmc0) = {
.name = "omap_hsmmc",
- .platdata = &am335x_mmc0_platdata,
+ .plat = &am335x_mmc0_plat,
};
-static const struct omap_hsmmc_plat am335x_mmc1_platdata = {
+static const struct omap_hsmmc_plat am335x_mmc1_plat = {
.base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE,
.cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_8BIT,
.cfg.f_min = 400000,
.cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,
};
-U_BOOT_DEVICE(am335x_mmc1) = {
+U_BOOT_DRVINFO(am335x_mmc1) = {
.name = "omap_hsmmc",
- .platdata = &am335x_mmc1_platdata,
+ .plat = &am335x_mmc1_plat,
};
#endif