am335x: Enable DDR PHY dynamic power down bit for DDR3 boards
[platform/kernel/u-boot.git] / board / ti / am335x / board.c
index 441758f..2e230f4 100644 (file)
@@ -73,7 +73,7 @@ static inline int board_is_idk(void)
        return !strncmp(header.config, "SKU#02", 6);
 }
 
-static int board_is_gp_evm(void)
+static int __maybe_unused board_is_gp_evm(void)
 {
        return !strncmp("A33515BB", header.name, 8);
 }
@@ -251,7 +251,8 @@ static struct emif_regs ddr3_emif_reg_data = {
        .sdram_tim2 = MT41J128MJT125_EMIF_TIM2,
        .sdram_tim3 = MT41J128MJT125_EMIF_TIM3,
        .zq_config = MT41J128MJT125_ZQ_CFG,
-       .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY,
+       .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY |
+                               PHY_EN_DYN_PWRDN,
 };
 
 static struct emif_regs ddr3_evm_emif_reg_data = {
@@ -261,7 +262,8 @@ static struct emif_regs ddr3_evm_emif_reg_data = {
        .sdram_tim2 = MT41J512M8RH125_EMIF_TIM2,
        .sdram_tim3 = MT41J512M8RH125_EMIF_TIM3,
        .zq_config = MT41J512M8RH125_ZQ_CFG,
-       .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY,
+       .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY |
+                               PHY_EN_DYN_PWRDN,
 };
 #endif