sunxi: Add axp209 pmic support
[platform/kernel/u-boot.git] / board / sunxi / board.c
index 328334a..8375711 100644 (file)
  */
 
 #include <common.h>
+#ifdef CONFIG_AXP209_POWER
+#include <axp209.h>
+#endif
 #include <asm/arch/clock.h>
 #include <asm/arch/dram.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/mmc.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -43,15 +48,102 @@ int dram_init(void)
        return 0;
 }
 
+#ifdef CONFIG_GENERIC_MMC
+static void mmc_pinmux_setup(int sdc)
+{
+       unsigned int pin;
+
+       switch (sdc) {
+       case 0:
+               /* D1-PF0, D0-PF1, CLK-PF2, CMD-PF3, D3-PF4, D4-PF5 */
+               for (pin = SUNXI_GPF(0); pin <= SUNXI_GPF(5); pin++) {
+                       sunxi_gpio_set_cfgpin(pin, SUNXI_GPF0_SDC0);
+                       sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
+                       sunxi_gpio_set_drv(pin, 2);
+               }
+               break;
+
+       case 1:
+               /* CMD-PH22, CLK-PH23, D0~D3-PH24~27 : 5 */
+               for (pin = SUNXI_GPH(22); pin <= SUNXI_GPH(27); pin++) {
+                       sunxi_gpio_set_cfgpin(pin, SUN4I_GPH22_SDC1);
+                       sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
+                       sunxi_gpio_set_drv(pin, 2);
+               }
+               break;
+
+       case 2:
+               /* CMD-PC6, CLK-PC7, D0-PC8, D1-PC9, D2-PC10, D3-PC11 */
+               for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(11); pin++) {
+                       sunxi_gpio_set_cfgpin(pin, SUNXI_GPC6_SDC2);
+                       sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
+                       sunxi_gpio_set_drv(pin, 2);
+               }
+               break;
+
+       case 3:
+               /* CMD-PI4, CLK-PI5, D0~D3-PI6~9 : 2 */
+               for (pin = SUNXI_GPI(4); pin <= SUNXI_GPI(9); pin++) {
+                       sunxi_gpio_set_cfgpin(pin, SUN4I_GPI4_SDC3);
+                       sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
+                       sunxi_gpio_set_drv(pin, 2);
+               }
+               break;
+
+       default:
+               printf("sunxi: invalid MMC slot %d for pinmux setup\n", sdc);
+               break;
+       }
+}
+
+int board_mmc_init(bd_t *bis)
+{
+       mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT);
+       sunxi_mmc_init(CONFIG_MMC_SUNXI_SLOT);
+#if !defined (CONFIG_SPL_BUILD) && defined (CONFIG_MMC_SUNXI_SLOT_EXTRA)
+       mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT_EXTRA);
+       sunxi_mmc_init(CONFIG_MMC_SUNXI_SLOT_EXTRA);
+#endif
+
+       return 0;
+}
+#endif
+
+void i2c_init_board(void)
+{
+       sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUNXI_GPB0_TWI0);
+       sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUNXI_GPB0_TWI0);
+       clock_twi_onoff(0, 1);
+}
+
 #ifdef CONFIG_SPL_BUILD
 void sunxi_board_init(void)
 {
+       int power_failed = 0;
        unsigned long ramsize;
 
+#ifdef CONFIG_AXP209_POWER
+       power_failed |= axp209_init();
+       power_failed |= axp209_set_dcdc2(1400);
+       power_failed |= axp209_set_dcdc3(1250);
+       power_failed |= axp209_set_ldo2(3000);
+       power_failed |= axp209_set_ldo3(2800);
+       power_failed |= axp209_set_ldo4(2800);
+#endif
+
        printf("DRAM:");
        ramsize = sunxi_dram_init();
        printf(" %lu MiB\n", ramsize >> 20);
        if (!ramsize)
                hang();
+
+       /*
+        * Only clock up the CPU to full speed if we are reasonably
+        * assured it's being powered with suitable core voltage
+        */
+       if (!power_failed)
+               clock_set_pll1(CONFIG_CLK_FULL_SPEED);
+       else
+               printf("Failed to set core voltage! Can't set CPU frequency\n");
 }
 #endif