Merge branch 'master' of git://git.denx.de/u-boot-i2c

[platform/kernel/u-boot.git] / board / sbc8641d / sbc8641d.c

diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c
index 1471e58..f118a6e 100644 (file)
--- a/board/sbc8641d/sbc8641d.c
+++ b/board/sbc8641d/sbc8641d.c
@@ -33,7 +33,7 @@
 #include <pci.h>
 #include <asm/processor.h>
 #include <asm/immap_86xx.h>
-#include <asm/immap_fsl_pci.h>
+#include <asm/fsl_pci.h>
 #include <asm/fsl_ddr_sdram.h>
 #include <libfdt.h>
 #include <fdt_support.h>
@@ -127,9 +127,9 @@ long int fixed_sdram (void)
        ddr->timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0;
        ddr->timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1;
        ddr->timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;
-       ddr->sdram_cfg_1 = CONFIG_SYS_DDR_CFG_1A;
+       ddr->sdram_cfg = CONFIG_SYS_DDR_CFG_1A;
        ddr->sdram_cfg_2 = CONFIG_SYS_DDR_CFG_2;
-       ddr->sdram_mode_1 = CONFIG_SYS_DDR_MODE_1;
+       ddr->sdram_mode = CONFIG_SYS_DDR_MODE_1;
        ddr->sdram_mode_2 = CONFIG_SYS_DDR_MODE_2;
        ddr->sdram_mode_cntl = CONFIG_SYS_DDR_MODE_CTL;
        ddr->sdram_interval = CONFIG_SYS_DDR_INTERVAL;
@@ -140,7 +140,7 @@ long int fixed_sdram (void)
 
        udelay (500);
 
-       ddr->sdram_cfg_1 = CONFIG_SYS_DDR_CFG_1B;
+       ddr->sdram_cfg = CONFIG_SYS_DDR_CFG_1B;
        asm ("sync; isync");
 
        udelay (500);
@@ -158,9 +158,9 @@ long int fixed_sdram (void)
        ddr->timing_cfg_0 = CONFIG_SYS_DDR2_TIMING_0;
        ddr->timing_cfg_1 = CONFIG_SYS_DDR2_TIMING_1;
        ddr->timing_cfg_2 = CONFIG_SYS_DDR2_TIMING_2;
-       ddr->sdram_cfg_1 = CONFIG_SYS_DDR2_CFG_1A;
+       ddr->sdram_cfg = CONFIG_SYS_DDR2_CFG_1A;
        ddr->sdram_cfg_2 = CONFIG_SYS_DDR2_CFG_2;
-       ddr->sdram_mode_1 = CONFIG_SYS_DDR2_MODE_1;
+       ddr->sdram_mode = CONFIG_SYS_DDR2_MODE_1;
        ddr->sdram_mode_2 = CONFIG_SYS_DDR2_MODE_2;
        ddr->sdram_mode_cntl = CONFIG_SYS_DDR2_MODE_CTL;
        ddr->sdram_interval = CONFIG_SYS_DDR2_INTERVAL;
@@ -171,7 +171,7 @@ long int fixed_sdram (void)
 
        udelay (500);
 
-       ddr->sdram_cfg_1 = CONFIG_SYS_DDR2_CFG_1B;
+       ddr->sdram_cfg = CONFIG_SYS_DDR2_CFG_1B;
        asm ("sync; isync");
 
        udelay (500);
@@ -209,9 +209,6 @@ static struct pci_controller pci2_hose;
 
 int first_free_busno = 0;
 
-extern int fsl_pci_setup_inbound_windows(struct pci_region *r);
-extern void fsl_pci_init(struct pci_controller *hose);
-
 void pci_init_board(void)
 {
        volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
@@ -247,14 +244,14 @@ void pci_init_board(void)
 
                /* outbound memory */
                pci_set_region(r++,
-                              CONFIG_SYS_PCI1_MEM_BASE,
+                              CONFIG_SYS_PCI1_MEM_BUS,
                               CONFIG_SYS_PCI1_MEM_PHYS,
                               CONFIG_SYS_PCI1_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
                pci_set_region(r++,
-                              CONFIG_SYS_PCI1_IO_BASE,
+                              CONFIG_SYS_PCI1_IO_BUS,
                               CONFIG_SYS_PCI1_IO_PHYS,
                               CONFIG_SYS_PCI1_IO_SIZE,
                               PCI_REGION_IO);
@@ -290,14 +287,14 @@ void pci_init_board(void)
 
        /* outbound memory */
        pci_set_region(r++,
-                      CONFIG_SYS_PCI2_MEM_BASE,
+                      CONFIG_SYS_PCI2_MEM_BUS,
                       CONFIG_SYS_PCI2_MEM_PHYS,
                       CONFIG_SYS_PCI2_MEM_SIZE,
                       PCI_REGION_MEM);
 
        /* outbound io */
        pci_set_region(r++,
-                      CONFIG_SYS_PCI2_IO_BASE,
+                      CONFIG_SYS_PCI2_IO_BUS,
                       CONFIG_SYS_PCI2_IO_PHYS,
                       CONFIG_SYS_PCI2_IO_SIZE,
                       PCI_REGION_IO);
@@ -321,9 +318,6 @@ void pci_init_board(void)
 
 
 #if defined(CONFIG_OF_BOARD_SETUP)
-extern void ft_fsl_pci_setup(void *blob, const char *pci_alias,
-                       struct pci_controller *hose);
-
 void ft_board_setup (void *blob, bd_t *bd)
 {
        ft_cpu_setup(blob, bd);
@@ -384,3 +378,41 @@ unsigned long get_board_sys_clk (ulong dummy)
 
        return val;
 }
+
+void board_reset(void)
+{
+#ifdef CONFIG_SYS_RESET_ADDRESS
+       ulong addr = CONFIG_SYS_RESET_ADDRESS;
+
+       /* flush and disable I/D cache */
+       __asm__ __volatile__ ("mfspr    3, 1008"        ::: "r3");
+       __asm__ __volatile__ ("ori      5, 5, 0xcc00"   ::: "r5");
+       __asm__ __volatile__ ("ori      4, 3, 0xc00"    ::: "r4");
+       __asm__ __volatile__ ("andc     5, 3, 5"        ::: "r5");
+       __asm__ __volatile__ ("sync");
+       __asm__ __volatile__ ("mtspr    1008, 4");
+       __asm__ __volatile__ ("isync");
+       __asm__ __volatile__ ("sync");
+       __asm__ __volatile__ ("mtspr    1008, 5");
+       __asm__ __volatile__ ("isync");
+       __asm__ __volatile__ ("sync");
+
+       /*
+        * SRR0 has system reset vector, SRR1 has default MSR value
+        * rfi restores MSR from SRR1 and sets the PC to the SRR0 value
+        */
+       __asm__ __volatile__ ("mtspr    26, %0"         :: "r" (addr));
+       __asm__ __volatile__ ("li       4, (1 << 6)"    ::: "r4");
+       __asm__ __volatile__ ("mtspr    27, 4");
+       __asm__ __volatile__ ("rfi");
+#endif
+}
+
+#ifdef CONFIG_MP
+extern void cpu_mp_lmb_reserve(struct lmb *lmb);
+
+void board_lmb_reserve(struct lmb *lmb)
+{
+       cpu_mp_lmb_reserve(lmb);
+}
+#endif