#include <command.h>
#include "metrobox.h"
#include "metrobox_version.h"
+#include <timestamp.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <spd_sdram.h>
#include <i2c.h>
#include "../common/ppc440gx_i2c.h"
#include "../common/sb_common.h"
+#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) || \
+ defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
+#include <net.h>
+#endif
void fpga_init (void);
mtsdr(sdr_pfc0, 0x00103E00);
/* Setup access for LEDs, and system topology info */
- gpio_regs = (ppc440_gpio_regs_t *)CFG_GPIO_BASE;
+ gpio_regs = (ppc440_gpio_regs_t *)CONFIG_SYS_GPIO_BASE;
gpio_regs->open_drain = SBCOMMON_GPIO_SYS_LEDS;
gpio_regs->tri_state = SBCOMMON_GPIO_DBGLEDS;
EBC_BXAP_RE_DISABLED | EBC_BXAP_BEM_WRITEONLY |
EBC_BXAP_PEN_DISABLED);
- mtebc(pb0cr, EBC_BXCR_BAS_ENCODE(CFG_FLASH_BASE) |
+ mtebc(pb0cr, EBC_BXCR_BAS_ENCODE(CONFIG_SYS_FLASH_BASE) |
EBC_BXCR_BS_1MB | EBC_BXCR_BU_RW | EBC_BXCR_BW_8BIT);
/*--------------------------------------------------------------------+
| 8KB NVRAM/RTC. Initialize bank 1 with default values.
unsigned char opto_rev, opto_id;
OPTO_FPGA_REGS_ST *opto_ps;
- opto_ps = (OPTO_FPGA_REGS_ST *)CFG_FPGA_BASE;
+ opto_ps = (OPTO_FPGA_REGS_ST *)CONFIG_SYS_FPGA_BASE;
opto_rev = (unsigned char)((opto_ps->revision_ul &
SAND_HAL_XC_XCVR_CNTL_REVISION_REVISION_MASK)
printf ("Board: Sandburst Corporation MetroBox Serial Number: %d\n", sernum);
printf ("%s\n", METROBOX_U_BOOT_REL_STR);
- printf ("Built %s %s by %s\n", __DATE__, __TIME__, BUILDUSER);
+ printf ("Built %s %s by %s\n", U_BOOT_DATE, U_BOOT_TIME, BUILDUSER);
if (sbcommon_get_master()) {
printf("Slot 0 - Master\nSlave board");
if (sbcommon_secondary_present())
/* Fix the ack in the bme 32 */
udelay(5000);
- out32(CFG_BME32_BASE + 0x0000000C, 0x00000001);
+ out32(CONFIG_SYS_BME32_BASE + 0x0000000C, 0x00000001);
asm("eieio");
{
/* Turn on i2c bus 1 */
puts ("I2C1: ");
- i2c1_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
+ i2c1_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
puts ("ready\n");
/* Turn on fans */
{
unsigned short sernum;
char envstr[255];
+ uchar enetaddr[6];
unsigned char opto_rev;
OPTO_FPGA_REGS_ST *opto_ps;
- opto_ps = (OPTO_FPGA_REGS_ST *)CFG_FPGA_BASE;
+ opto_ps = (OPTO_FPGA_REGS_ST *)CONFIG_SYS_FPGA_BASE;
if(NULL != getenv("secondserial")) {
puts("secondserial is set, switching to second serial port\n");
setenv("ubrelver", METROBOX_U_BOOT_REL_STR);
memset(envstr, 0, 255);
- sprintf (envstr, "Built %s %s by %s", __DATE__, __TIME__, BUILDUSER);
+ sprintf (envstr, "Built %s %s by %s",
+ U_BOOT_DATE, U_BOOT_TIME, BUILDUSER);
setenv("bldstr", envstr);
saveenv();
}
}
+#ifdef CONFIG_HAS_ETH0
+ if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
+ board_get_enetaddr(0, enetaddr);
+ eth_setenv_enetaddr("ethaddr", enetaddr);
+ }
+#endif
+
+#ifdef CONFIG_HAS_ETH1
+ if (!eth_getenv_enetaddr("eth1addr", enetaddr)) {
+ board_get_enetaddr(1, enetaddr);
+ eth_setenv_enetaddr("eth1addr", enetaddr);
+ }
+#endif
+
+#ifdef CONFIG_HAS_ETH2
+ if (!eth_getenv_enetaddr("eth2addr", enetaddr)) {
+ board_get_enetaddr(2, enetaddr);
+ eth_setenv_enetaddr("eth2addr", enetaddr);
+ }
+#endif
+
+#ifdef CONFIG_HAS_ETH3
+ if (!eth_getenv_enetaddr("eth3addr", enetaddr)) {
+ board_get_enetaddr(3, enetaddr);
+ eth_setenv_enetaddr("eth3addr", enetaddr);
+ }
+#endif
+
return (0);
}
void ide_set_reset(int on)
{
OPTO_FPGA_REGS_ST *opto_ps;
- opto_ps = (OPTO_FPGA_REGS_ST *)CFG_FPGA_BASE;
+ opto_ps = (OPTO_FPGA_REGS_ST *)CONFIG_SYS_FPGA_BASE;
if (on) { /* assert RESET */
opto_ps->reset_ul &= ~SAND_HAL_XC_XCVR_CNTL_RESET_CF_RESET_N_MASK;
/*
* Take appropriate hw bits out of reset
*/
- opto_ps = (OPTO_FPGA_REGS_ST *)CFG_FPGA_BASE;
+ opto_ps = (OPTO_FPGA_REGS_ST *)CONFIG_SYS_FPGA_BASE;
tmp =
SAND_HAL_XC_XCVR_CNTL_RESET_MAC1_RESET_N_MASK |
}
U_BOOT_CMD(mbsetup, 1, 1, metroboxSetupVars,
- "mbsetup - Set environment to factory defaults\n", NULL);
+ "Set environment to factory defaults", "");
U_BOOT_CMD(mbrecover, 1, 1, metroboxRecover,
- "mbrecover - Set environment to allow for fs recovery\n", NULL);
+ "Set environment to allow for fs recovery", "");