* Kyungmin Park <kyungmin.park@samsung.com>
* Donghwa Lee <dh09.lee@samsung.com>
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/arch/cpu.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
#include <asm/arch/clock.h>
#include <asm/arch/clk.h>
#include <asm/arch/mipi_dsim.h>
#include <power/max8997_pmic.h>
#include <libtizen.h>
#include <power/max8997_muic.h>
+#include <power/battery.h>
#include <power/max17042_fg.h>
+#include <usb_mass_storage.h>
#include "setup.h"
#endif
static void check_hw_revision(void);
-
-static int hwrevision(int rev)
-{
- return (board_rev & 0xf) == rev;
-}
-
struct s3c_plat_otg_data s5pc210_otg_data;
int board_init(void)
{
- gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+ gd->bd->bi_boot_params = CONFIG_SYS_SPL_ARGS_ADDR;
check_hw_revision();
printf("HW Revision:\t0x%x\n", board_rev);
s5p_gpio_direction_output(&gpio2->y4, 1, 1);
}
+static void trats_low_power_mode(void)
+{
+ struct exynos4_clock *clk =
+ (struct exynos4_clock *)samsung_get_base_clock();
+ struct exynos4_power *pwr =
+ (struct exynos4_power *)samsung_get_base_power();
+
+ /* Power down CORE1 */
+ /* LOCAL_PWR_CFG [1:0] 0x3 EN, 0x0 DIS */
+ writel(0x0, &pwr->arm_core1_configuration);
+
+ /* Change the APLL frequency */
+ /* ENABLE (1 enable) | LOCKED (1 locked) */
+ /* [31] | [29] */
+ /* FSEL | MDIV | PDIV | SDIV */
+ /* [27] | [25:16] | [13:8] | [2:0] */
+ writel(0xa0c80604, &clk->apll_con0);
+
+ /* Change CPU0 clock divider */
+ /* CORE2_RATIO | APLL_RATIO | PCLK_DBG_RATIO | ATB_RATIO */
+ /* [30:28] | [26:24] | [22:20] | [18:16] */
+ /* PERIPH_RATIO | COREM1_RATIO | COREM0_RATIO | CORE_RATIO */
+ /* [14:12] | [10:8] | [6:4] | [2:0] */
+ writel(0x00000100, &clk->div_cpu0);
+
+ /* CLK_DIV_STAT_CPU0 - wait until clock gets stable (0 = stable) */
+ while (readl(&clk->div_stat_cpu0) & 0x1111111)
+ continue;
+
+ /* Change clock divider ratio for DMC */
+ /* DMCP_RATIO | DMCD_RATIO */
+ /* [22:20] | [18:16] */
+ /* DMC_RATIO | DPHY_RATIO | ACP_PCLK_RATIO | ACP_RATIO */
+ /* [14:12] | [10:8] | [6:4] | [2:0] */
+ writel(0x13113117, &clk->div_dmc0);
+
+ /* CLK_DIV_STAT_DMC0 - wait until clock gets stable (0 = stable) */
+ while (readl(&clk->div_stat_dmc0) & 0x11111111)
+ continue;
+
+ /* Turn off unnecessary power domains */
+ writel(0x0, &pwr->xxti_configuration); /* XXTI */
+ writel(0x0, &pwr->cam_configuration); /* CAM */
+ writel(0x0, &pwr->tv_configuration); /* TV */
+ writel(0x0, &pwr->mfc_configuration); /* MFC */
+ writel(0x0, &pwr->g3d_configuration); /* G3D */
+ writel(0x0, &pwr->gps_configuration); /* GPS */
+ writel(0x0, &pwr->gps_alive_configuration); /* GPS_ALIVE */
+
+ /* Turn off unnecessary clocks */
+ writel(0x0, &clk->gate_ip_cam); /* CAM */
+ writel(0x0, &clk->gate_ip_tv); /* TV */
+ writel(0x0, &clk->gate_ip_mfc); /* MFC */
+ writel(0x0, &clk->gate_ip_g3d); /* G3D */
+ writel(0x0, &clk->gate_ip_image); /* IMAGE */
+ writel(0x0, &clk->gate_ip_gps); /* GPS */
+}
+
static int pmic_init_max8997(void)
{
struct pmic *p = pmic_get("MAX8997_PMIC");
int power_init_board(void)
{
- int ret;
+ int chrg, ret;
+ struct power_battery *pb;
+ struct pmic *p_fg, *p_chrg, *p_muic, *p_bat;
ret = pmic_init(I2C_5);
ret |= pmic_init_max8997();
ret |= power_fg_init(I2C_9);
ret |= power_muic_init(I2C_5);
+ ret |= power_bat_init(0);
if (ret)
return ret;
+ p_fg = pmic_get("MAX17042_FG");
+ if (!p_fg) {
+ puts("MAX17042_FG: Not found\n");
+ return -ENODEV;
+ }
+
+ p_chrg = pmic_get("MAX8997_PMIC");
+ if (!p_chrg) {
+ puts("MAX8997_PMIC: Not found\n");
+ return -ENODEV;
+ }
+
+ p_muic = pmic_get("MAX8997_MUIC");
+ if (!p_muic) {
+ puts("MAX8997_MUIC: Not found\n");
+ return -ENODEV;
+ }
+
+ p_bat = pmic_get("BAT_TRATS");
+ if (!p_bat) {
+ puts("BAT_TRATS: Not found\n");
+ return -ENODEV;
+ }
+
+ p_fg->parent = p_bat;
+ p_chrg->parent = p_bat;
+ p_muic->parent = p_bat;
+
+ p_bat->low_power_mode = trats_low_power_mode;
+ p_bat->pbat->battery_init(p_bat, p_fg, p_chrg, p_muic);
+
+ pb = p_bat->pbat;
+ chrg = p_muic->chrg->chrg_type(p_muic);
+ debug("CHARGER TYPE: %d\n", chrg);
+
+ if (!p_chrg->chrg->chrg_bat_present(p_chrg)) {
+ puts("No battery detected\n");
+ return -1;
+ }
+
+ p_fg->fg->fg_battery_check(p_fg, p_bat);
+
+ if (pb->bat->state == CHARGE && chrg == CHARGER_USB)
+ puts("CHARGE Battery !\n");
+
return 0;
}
int dram_init(void)
{
gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
- get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+ get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) +
+ get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) +
+ get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
return 0;
}
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+ gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+ gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
+ gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+ gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
}
static unsigned int get_hw_revision(void)
{
struct exynos4_gpio_part2 *gpio =
(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
- int i, err;
+ int err;
/* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
s5p_gpio_direction_output(&gpio->k0, 2, 1);
s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE);
/*
- * eMMC GPIO:
- * SDR 8-bit@48MHz at MMC0
- * GPK0[0] SD_0_CLK(2)
- * GPK0[1] SD_0_CMD(2)
- * GPK0[2] SD_0_CDn -> Not used
- * GPK0[3:6] SD_0_DATA[0:3](2)
- * GPK1[3:6] SD_0_DATA[0:3](3)
- *
- * DDR 4-bit@26MHz at MMC4
- * GPK0[0] SD_4_CLK(3)
- * GPK0[1] SD_4_CMD(3)
- * GPK0[2] SD_4_CDn -> Not used
- * GPK0[3:6] SD_4_DATA[0:3](3)
- * GPK1[3:6] SD_4_DATA[4:7](4)
- */
- for (i = 0; i < 7; i++) {
- if (i == 2)
- continue;
- /* GPK0[0:6] special function 2 */
- s5p_gpio_cfg_pin(&gpio->k0, i, 0x2);
- /* GPK0[0:6] pull disable */
- s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE);
- /* GPK0[0:6] drv 4x */
- s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X);
- }
-
- for (i = 3; i < 7; i++) {
- /* GPK1[3:6] special function 3 */
- s5p_gpio_cfg_pin(&gpio->k1, i, 0x3);
- /* GPK1[3:6] pull disable */
- s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE);
- /* GPK1[3:6] drv 4x */
- s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X);
- }
-
- /*
* MMC device init
* mmc0 : eMMC (8-bit buswidth)
* mmc2 : SD card (4-bit buswidth)
*/
- err = s5p_mmc_init(0, 8);
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
+ if (err)
+ debug("SDMMC0 not configured\n");
+ else
+ err = s5p_mmc_init(0, 8);
/* T-flash detect */
s5p_gpio_cfg_pin(&gpio->x3, 4, 0xf);
* GPX3[4] T-flash detect pin
*/
if (!s5p_gpio_get_value(&gpio->x3, 4)) {
- /*
- * SD card GPIO:
- * GPK2[0] SD_2_CLK(2)
- * GPK2[1] SD_2_CMD(2)
- * GPK2[2] SD_2_CDn -> Not used
- * GPK2[3:6] SD_2_DATA[0:3](2)
- */
- for (i = 0; i < 7; i++) {
- if (i == 2)
- continue;
- /* GPK2[0:6] special function 2 */
- s5p_gpio_cfg_pin(&gpio->k2, i, 0x2);
- /* GPK2[0:6] pull disable */
- s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE);
- /* GPK2[0:6] drv 4x */
- s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X);
- }
- err = s5p_mmc_init(2, 4);
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+ if (err)
+ debug("SDMMC2 not configured\n");
+ else
+ err = s5p_mmc_init(2, 4);
}
return err;
writel(0, (unsigned int)&pwr->lcd1_configuration);
writel(0, (unsigned int)&pwr->gps_configuration);
writel(0, (unsigned int)&pwr->gps_alive_configuration);
+
+ /* It is necessary to power down core 1 */
+ /* to successfully boot CPU1 in kernel */
+ writel(0, (unsigned int)&pwr->arm_core1_configuration);
}
static void board_uart_init(void)
return 0;
}
-static void lcd_reset(void)
+void exynos_reset_lcd(void)
{
struct exynos4_gpio_part2 *gpio2 =
(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
.vl_cmd_allow_len = 0xf,
.win_id = 3,
- .cfg_gpio = NULL,
- .backlight_on = NULL,
- .lcd_power_on = NULL, /* lcd_power_on in mipi dsi driver */
- .reset_lcd = lcd_reset,
.dual_lcd_enabled = 0,
.init_delay = 0,
#ifdef CONFIG_TIZEN
get_tizen_logo_info(vid);
#endif
-
- if (hwrevision(2))
- mipi_lcd_device.reverse_panel = 1;
+ mipi_lcd_device.reverse_panel = 1;
strcpy(s6e8ax0_platform_data.lcd_panel_name, mipi_lcd_device.name);
s6e8ax0_platform_data.lcd_power = lcd_power;
setenv("lcdinfo", "lcd=s6e8ax0");
}
+
+#ifdef CONFIG_USB_GADGET_MASS_STORAGE
+static int ums_read_sector(struct ums_device *ums_dev,
+ ulong start, lbaint_t blkcnt, void *buf)
+{
+ if (ums_dev->mmc->block_dev.block_read(ums_dev->dev_num,
+ start + ums_dev->offset, blkcnt, buf) != blkcnt)
+ return -1;
+
+ return 0;
+}
+
+static int ums_write_sector(struct ums_device *ums_dev,
+ ulong start, lbaint_t blkcnt, const void *buf)
+{
+ if (ums_dev->mmc->block_dev.block_write(ums_dev->dev_num,
+ start + ums_dev->offset, blkcnt, buf) != blkcnt)
+ return -1;
+
+ return 0;
+}
+
+static void ums_get_capacity(struct ums_device *ums_dev,
+ long long int *capacity)
+{
+ long long int tmp_capacity;
+
+ tmp_capacity = (long long int) ((ums_dev->offset + ums_dev->part_size)
+ * SECTOR_SIZE);
+ *capacity = ums_dev->mmc->capacity - tmp_capacity;
+}
+
+static struct ums_board_info ums_board = {
+ .read_sector = ums_read_sector,
+ .write_sector = ums_write_sector,
+ .get_capacity = ums_get_capacity,
+ .name = "TRATS UMS disk",
+ .ums_dev = {
+ .mmc = NULL,
+ .dev_num = 0,
+ .offset = 0,
+ .part_size = 0.
+ },
+};
+
+struct ums_board_info *board_ums_init(unsigned int dev_num, unsigned int offset,
+ unsigned int part_size)
+{
+ struct mmc *mmc;
+
+ mmc = find_mmc_device(dev_num);
+ if (!mmc)
+ return NULL;
+
+ ums_board.ums_dev.mmc = mmc;
+ ums_board.ums_dev.dev_num = dev_num;
+ ums_board.ums_dev.offset = offset;
+ ums_board.ums_dev.part_size = part_size;
+
+ return &ums_board;
+}
+#endif
projects / platform / kernel / u-boot.git / blobdiff