*
* Copyright (C) 2013 Renesas Electronics Corporation
* Copyright (C) 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+ * Copyright (C) 2015 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*
* SPDX-License-Identifier: GPL-2.0
*/
RMSTPCR4, MSTP4_BITS, CONFIG_RMSTP4_ENA },
{ SMSTPCR5, MSTP5_BITS, CONFIG_SMSTP5_ENA,
RMSTPCR5, MSTP5_BITS, CONFIG_RMSTP5_ENA },
- /* No MSTP6 */
+#ifdef CONFIG_RCAR_GEN3
+ { SMSTPCR6, MSTP6_BITS, CONFIG_SMSTP6_ENA,
+ RMSTPCR6, MSTP6_BITS, CONFIG_RMSTP6_ENA },
+#endif
{ SMSTPCR7, MSTP7_BITS, CONFIG_SMSTP7_ENA,
RMSTPCR7, MSTP7_BITS, CONFIG_RMSTP7_ENA },
{ SMSTPCR8, MSTP8_BITS, CONFIG_SMSTP8_ENA,
/* Stop module clock */
for (i = 0; i < ARRAY_SIZE(mstptbl); i++) {
- mstp_setclrbits_le32(mstptbl[i].s_addr, mstptbl[i].s_dis,
+ mstp_setclrbits_le32((uintptr_t)mstptbl[i].s_addr,
+ mstptbl[i].s_dis,
mstptbl[i].s_ena);
- mstp_setclrbits_le32(mstptbl[i].r_addr, mstptbl[i].r_dis,
+ mstp_setclrbits_le32((uintptr_t)mstptbl[i].r_addr,
+ mstptbl[i].r_dis,
mstptbl[i].r_ena);
}
}