#include <common.h>
-#include <asm/processor.h>
+#include <libfdt.h>
+#include <fdt_support.h>
#include <spd_sdram.h>
#include <ppc4xx_enet.h>
#include <miiphy.h>
+#include <asm/processor.h>
DECLARE_GLOBAL_DATA_PTR;
mtdcr (uicb0tr, 0x00000000); /* */
mtdcr (uicb0vr, 0x00000001); /* */
+ /* Setup shutdown/SSD empty interrupt as inputs */
+ out32(GPIO0_TCR, in32(GPIO0_TCR) & ~(CFG_GPIO_SHUTDOWN | CFG_GPIO_SSD_EMPTY));
+ out32(GPIO0_ODR, in32(GPIO0_ODR) & ~(CFG_GPIO_SHUTDOWN | CFG_GPIO_SSD_EMPTY));
+
/* Setup GPIO/IRQ multiplexing */
- mtsdr(sdr_pfc0, 0x01a03e00);
+ mtsdr(sdr_pfc0, 0x01a33e00);
return 0;
}
static int board_rev(void)
{
- int rev;
- u32 pfc0;
-
- /* Setup GPIO14 & 15 as GPIO */
- mfsdr(sdr_pfc0, pfc0);
- pfc0 |= CFG_GPIO_REV0 | CFG_GPIO_REV1;
- mtsdr(sdr_pfc0, pfc0);
-
/* Setup as input */
- out32(GPIO0_TCR, in32(GPIO0_TCR) & ~(CFG_GPIO_REV0 | CFG_GPIO_REV0));
- out32(GPIO0_ODR, in32(GPIO0_ODR) & ~(CFG_GPIO_REV0 | CFG_GPIO_REV0));
-
- rev = (in32(GPIO0_IR) >> 16) & 0x3;
+ out32(GPIO0_TCR, in32(GPIO0_TCR) & ~(CFG_GPIO_REV0 | CFG_GPIO_REV1));
+ out32(GPIO0_ODR, in32(GPIO0_ODR) & ~(CFG_GPIO_REV0 | CFG_GPIO_REV1));
- /* Setup GPIO14 & 15 as non GPIO again */
- mfsdr(sdr_pfc0, pfc0);
- pfc0 &= ~(CFG_GPIO_REV0 | CFG_GPIO_REV1);
- mtsdr(sdr_pfc0, pfc0);
-
- return rev;
+ return (in32(GPIO0_IR) >> 16) & 0x3;
}
int checkboard (void)
return (0);
}
-#if defined(CFG_DRAM_TEST)
-int testdram (void)
-{
- uint *pstart = (uint *) 0x00000000;
- uint *pend = (uint *) 0x08000000;
- uint *p;
-
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
- return 0;
-}
-#endif
-
/*************************************************************************
* pci_pre_init
*
* certain pre-initialization actions.
*
************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
unsigned long strap;
return 1;
}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
return (ctrlc());
}
#endif
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+ u32 val[4];
+ int rc;
+
+ ft_cpu_setup(blob, bd);
+
+ /* Fixup NOR mapping */
+ val[0] = 0; /* chip select number */
+ val[1] = 0; /* always 0 */
+ val[2] = gd->bd->bi_flashstart;
+ val[3] = gd->bd->bi_flashsize;
+ rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
+ val, sizeof(val), 1);
+ if (rc)
+ printf("Unable to update property NOR mapping, err=%s\n",
+ fdt_strerror(rc));
+}
+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */