pcm051: Enable DDR PHY dynamic power down bit

[platform/kernel/u-boot.git] / board / phytec / pcm051 / board.c

diff --git a/board/phytec/pcm051/board.c b/board/phytec/pcm051/board.c
index 1708ac2..43d7b6e 100644 (file)
--- a/board/phytec/pcm051/board.c
+++ b/board/phytec/pcm051/board.c
@@ -104,7 +104,8 @@ static struct emif_regs ddr3_emif_reg_data = {
        .sdram_tim2 = MT41J256M8HX15E_EMIF_TIM2,
        .sdram_tim3 = MT41J256M8HX15E_EMIF_TIM3,
        .zq_config = MT41J256M8HX15E_ZQ_CFG,
-       .emif_ddr_phy_ctlr_1 = MT41J256M8HX15E_EMIF_READ_LATENCY,
+       .emif_ddr_phy_ctlr_1 = MT41J256M8HX15E_EMIF_READ_LATENCY |
+                               PHY_EN_DYN_PWRDN,
 };
 #endif