#include <spd_sdram.h>
#include <status_led.h>
#include <sha1.h>
+#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
*-------------------------------------------------------------------*/
mfsdr(sdr_pci0, reg);
mtsdr(sdr_pci0, 0x80000000 | reg); /* PCI arbiter enabled */
- mtsdr(sdr_pfc0, 0x00000100); /* Pin function: enable GPIO49-63 */
+ mtsdr(sdr_pfc0, 0x00000000); /* Pin function: enable GPIO49-63 */
mtsdr(sdr_pfc1, 0x00048000); /* Pin function: UART0 has 4 pins, select IRQ5 */
return 0;
);
#endif
+#if defined (CONFIG_CMD_IDE)
+/* These addresses need to be shifted one place to the left
+ * ( bus per_addr 20 -30 is connectsd on CF bus A10-A0)
+ * These values are shifted
+ */
+extern ulong *ide_bus_offset;
+void inline ide_outb(int dev, int port, unsigned char val)
+{
+ debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
+ dev, port, val, (ATA_CURR_BASE(dev)+port));
+
+ out_be16((u16 *)(ATA_CURR_BASE(dev)+(port << 1)), val);
+}
+unsigned char inline ide_inb(int dev, int port)
+{
+ uchar val;
+ val = in_be16((u16 *)(ATA_CURR_BASE(dev)+(port << 1)));
+ debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
+ dev, port, (ATA_CURR_BASE(dev)+port), val);
+ return (val);
+}
+#endif
+
#ifdef CONFIG_IDE_PREINIT
int ide_preinit (void)
{
}
#endif
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+#if defined (CONFIG_CMD_IDE) && defined (CONFIG_IDE_RESET)
void ide_set_reset (int idereset)
{
debug ("ide_reset(%d)\n", idereset);
}
udelay (10000);
}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
+#endif /* defined (CONFIG_CMD_IDE) && defined (CONFIG_IDE_RESET) */