* Ивайло Димитров <freemangordon@abv.bg>
*
* (C) Copyright 2011-2012
- * Pali Rohár <pali.rohar@gmail.com>
+ * Pali Rohár <pali@kernel.org>
*
* (C) Copyright 2008
* Dirk Behme <dirk.behme@gmail.com>
MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\
MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) /*UART2_TX*/
+#define ONENAND_GPMC_CONFIG1_RX51 0xfb001202
+#define ONENAND_GPMC_CONFIG2_RX51 0x00111100
+#define ONENAND_GPMC_CONFIG3_RX51 0x00020200
+#define ONENAND_GPMC_CONFIG4_RX51 0x11001102
+#define ONENAND_GPMC_CONFIG5_RX51 0x03101616
+#define ONENAND_GPMC_CONFIG6_RX51 0x90060000
+
#endif