rename CFG_ENV macros to CONFIG_ENV

[platform/kernel/u-boot.git] / board / netstal / hcu5 / hcu5.c

diff --git a/board/netstal/hcu5/hcu5.c b/board/netstal/hcu5/hcu5.c
index 2c7afe2..f3428c2 100644 (file)
--- a/board/netstal/hcu5/hcu5.c
+++ b/board/netstal/hcu5/hcu5.c
@@ -240,18 +240,18 @@ int misc_init_r(void)
        unsigned long usb2phy0cr, usb2h0cr = 0;
        unsigned long sdr0_pfc1;
 
-#ifdef CFG_ENV_IS_IN_FLASH
+#ifdef CONFIG_ENV_IS_IN_FLASH
        /* Monitor protection ON by default */
        (void)flash_protect(FLAG_PROTECT_SET,
                            -CFG_MONITOR_LEN,
                            0xffffffff,
                            &flash_info[0]);
 
-#ifdef CFG_ENV_ADDR_REDUND
+#ifdef CONFIG_ENV_ADDR_REDUND
        /* Env protection ON by default */
        (void)flash_protect(FLAG_PROTECT_SET,
-                           CFG_ENV_ADDR_REDUND,
-                           CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1,
+                           CONFIG_ENV_ADDR_REDUND,
+                           CONFIG_ENV_ADDR_REDUND + 2*CONFIG_ENV_SECT_SIZE - 1,
                            &flash_info[0]);
 #endif
 #endif
@@ -309,15 +309,13 @@ int misc_init_r(void)
         */
        if (mfspr(dbcr0) & 0x80000000) {
                /* External debugger alive
-                * enable trace facilty for Lauterback
-                * CCR0[DAPUIB]=0       Enable broadcast of instruction data
-                *                      to auxiliary processor interface
-                * CCR0[DTB]=0          Enable broadcast of trace information
-                * SDR0_PFC0[TRE]       Trace signals are enabled instead of
+                * enable trace facilty for Lauterbach
+                * CCR0[DTB]=0          Enable broadcast of trace information
+                * SDR0_PFC0[TRE]       Trace signals are enabled instead of
                 *                      GPIO49-63
                 */
-               mtspr(ccr0, mfspr(ccr0)  &~ 0x00108000);
-               mtsdr(SDR0_PFC0, sdr0_pfc1 | 0x00000100);
+               mtspr(ccr0, mfspr(ccr0)  &~ (CCR0_DTB));
+               mtsdr(SDR0_PFC0, sdr0_pfc1 | SDR0_PFC0_TRE_ENABLE);
        }
        return 0;
 }
@@ -501,3 +499,18 @@ void ft_board_setup(void *blob, bd_t *bd)
 
 }
 #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
+
+/*
+ * Hardcoded flash setup:
+ * Flash 0 is a non-CFI AMD AM29F040 flash, 8 bit flash / 8 bit bus.
+ */
+ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info)
+{
+       if (banknum == 0) {     /* non-CFI boot flash */
+               info->portwidth = 1;
+               info->chipwidth = 1;
+               info->interface = FLASH_CFI_X8;
+               return 1;
+       } else
+               return 0;
+}