*
* Ming-Len Wu <minglen_wu@techware.com.tw>
*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
/* 4Mx16x2 IAM=0 CSD1 */
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
/* Following Setting is for CSD1 */
#define SFCTL 0x00221004
#define CMD_LCR (CMD_NORMAL + 0x60000000) /* LCR Command */
#define CMD_PROGRAM (CMD_NORMAL + 0x70000000)
-#define MODE_REG_VAL (CFG_FLASH_BASE+0x0008CC00) /* Cas Latency 3 */
+#define MODE_REG_VAL (CONFIG_SYS_FLASH_BASE+0x0008CC00) /* Cas Latency 3 */
/* LCR Command */
#define LCR_READSTATUS (0x0001C000) /* 0x70 */
/* Get Status register */
u32 SF_SR(void) {
- u32 tmp,tmp1;
+ u32 tmp;
reg_SFCTL = CMD_PROGRAM;
- tmp = __REG(CFG_FLASH_BASE);
+ tmp = __REG(CONFIG_SYS_FLASH_BASE);
reg_SFCTL = CMD_NORMAL;
reg_SFCTL = CMD_LCR; /* Activate LCR Mode */
- tmp1 = __REG(CFG_FLASH_BASE + LCR_SR_CLEAR);
+ __REG(CONFIG_SYS_FLASH_BASE + LCR_SR_CLEAR);
return tmp;
}
/* Issue the precharge all command */
void SF_PrechargeAll(void) {
- u32 tmp;
-
- reg_SFCTL = CMD_PREC; /* Set Precharge Command */
- tmp = __REG(CFG_FLASH_BASE + SYNCFLASH_A10); /* Issue Precharge All Command */
+ /* Set Precharge Command */
+ reg_SFCTL = CMD_PREC;
+ /* Issue Precharge All Command */
+ __REG(CONFIG_SYS_FLASH_BASE + SYNCFLASH_A10);
}
/* set SyncFlash to normal mode */
/* Erase SyncFlash */
void SF_Erase(u32 RowAddress) {
- u32 tmp;
reg_SFCTL = CMD_NORMAL;
- tmp = __REG(RowAddress);
+ __REG(RowAddress);
reg_SFCTL = CMD_PREC;
- tmp = __REG(RowAddress);
+ __REG(RowAddress);
reg_SFCTL = CMD_LCR; /* Set LCR mode */
__REG(RowAddress + LCR_ERASE_CONFIRM) = 0; /* Issue Erase Setup Command */
SF_PrechargeAll();
reg_SFCTL = CMD_LCR; /* Set to LCR mode */
- __REG(CFG_FLASH_BASE + LCR_ERASE_NVMODE) = 0; /* Issue Erase Nvmode Reg Command */
+ __REG(CONFIG_SYS_FLASH_BASE + LCR_ERASE_NVMODE) = 0; /* Issue Erase Nvmode Reg Command */
reg_SFCTL = CMD_NORMAL; /* Return to Normal mode */
- __REG(CFG_FLASH_BASE + LCR_ERASE_NVMODE) = 0xC0C0C0C0; /* Confirm */
+ __REG(CONFIG_SYS_FLASH_BASE + LCR_ERASE_NVMODE) = 0xC0C0C0C0; /* Confirm */
while(!SF_Ready());
}
SF_PrechargeAll();
reg_SFCTL = CMD_LCR; /* Set to LCR mode */
- __REG(CFG_FLASH_BASE+LCR_PROG_NVMODE) = 0; /* Issue Program Nvmode reg command */
+ __REG(CONFIG_SYS_FLASH_BASE+LCR_PROG_NVMODE) = 0; /* Issue Program Nvmode reg command */
reg_SFCTL = CMD_NORMAL; /* Return to Normal mode */
- __REG(CFG_FLASH_BASE+LCR_PROG_NVMODE) = 0xC0C0C0C0; /* Confirm not needed */
+ __REG(CONFIG_SYS_FLASH_BASE+LCR_PROG_NVMODE) = 0xC0C0C0C0; /* Confirm not needed */
}
/****************************************************************************************/
ulong flash_init(void) {
int i, j;
- u32 tmp;
/* Turn on CSD1 for negating RESETSF of SyncFLash */
udelay(200);
reg_SFCTL = CMD_LMR; /* Set Load Mode Register Command */
- tmp = __REG(MODE_REG_VAL); /* Issue Load Mode Register Command */
+ __REG(MODE_REG_VAL); /* Issue Load Mode Register Command */
SF_Normal();
flash_info[i].flash_id = FLASH_MAN_MT | FLASH_MT28S4M16LC;
flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
+ flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
+ memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] = CFG_FLASH_BASE + j * 0x00100000;
+ flash_info[i].start[j] = CONFIG_SYS_FLASH_BASE + j * 0x00100000;
}
flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
+ CONFIG_SYS_FLASH_BASE,
+ CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
&flash_info[0]);
flash_protect(FLAG_PROTECT_SET,
/* arm simple, non interrupt dependent timer */
- reset_timer_masked();
+ get_timer(0);
SF_NvmodeErase();
SF_NvmodeWrite();
- SF_Erase(CFG_FLASH_BASE + (0x0100000 * sect));
+ SF_Erase(CONFIG_SYS_FLASH_BASE + (0x0100000 * sect));
SF_Normal();
printf("ok.\n");