* can be divided by 16 or 256
* and is a 16-bit counter
*/
-/* U-Boot expects a 32 bit timer running at CFG_HZ*/
+/* U-Boot expects a 32 bit timer running at CONFIG_SYS_HZ*/
static ulong timestamp; /* U-Boot ticks since startup */
static ulong total_count = 0; /* Total timer count */
static ulong lastdec; /* Timer reading at last call */
static ulong div_timer = 1; /* Divisor to convert timer reading
* change to U-Boot ticks
*/
-/* CFG_HZ = CFG_HZ_CLOCK/(div_clock * div_timer) */
+/* CONFIG_SYS_HZ = CONFIG_SYS_HZ_CLOCK/(div_clock * div_timer) */
#define TIMER_LOAD_VAL 0x0000FFFFL
-#define READ_TIMER ((*(volatile ulong *)(CFG_TIMERBASE+4)) & 0x0000FFFFL)
+#define READ_TIMER ((*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4)) & 0x0000FFFFL)
-/* all function return values in U-Boot ticks i.e. (1/CFG_HZ) sec
+/* all function return values in U-Boot ticks i.e. (1/CONFIG_SYS_HZ) sec
* - unless otherwise stated
*/
int interrupt_init (void)
{
/* Load timer with initial value */
- *(volatile ulong *)(CFG_TIMERBASE + 0) = TIMER_LOAD_VAL;
+ *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 0) = TIMER_LOAD_VAL;
/* Set timer to be
* enabled 1
* free-running 0
* divider 256 10
* XX 00
*/
- *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x00000088;
+ *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = 0x00000088;
total_count = 0;
/* init the timestamp and lastdec value */
reset_timer_masked();
- div_timer = CFG_HZ_CLOCK / CFG_HZ;
+ div_timer = CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ;
div_timer /= div_clock;
return (0);
ulong tmo, tmp;
/* Convert to U-Boot ticks */
- tmo = usec * CFG_HZ;
+ tmo = usec * CONFIG_SYS_HZ;
tmo /= (1000000L);
tmp = get_timer_masked(); /* get current timestamp */
*/
ulong get_tbclk (void)
{
- return CFG_HZ_CLOCK/div_clock;
+ return CONFIG_SYS_HZ_CLOCK/div_clock;
}
int board_eth_init(bd_t *bis)