Merge branch 'master' of rsync://rsync.denx.de/git/u-boot

[platform/kernel/u-boot.git] / board / icecube / icecube.c

diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c
index 15def0c..4f056b2 100644 (file)
--- a/board/icecube/icecube.c
+++ b/board/icecube/icecube.c
@@ -27,13 +27,17 @@
 #include <common.h>
 #include <mpc5xxx.h>
 #include <pci.h>
+#include <asm/processor.h>
 
-#if defined(CONFIG_MPC5200_DDR)
-#include "mt46v16m16-75.h"
+#if defined(CONFIG_LITE5200B)
+#include "mt46v32m16.h"
 #else
+# if defined(CONFIG_MPC5200_DDR)
+#  include "mt46v16m16-75.h"
+# else
 #include "mt48lc16m16a2-75.h"
+# endif
 #endif
-
 #ifndef CFG_RAMBOOT
 static void sdram_start (int hi_addr)
 {
@@ -86,6 +90,8 @@ long int initdram (int board_type)
 {
        ulong dramsize = 0;
        ulong dramsize2 = 0;
+       uint svr, pvr;
+
 #ifndef CFG_RAMBOOT
        ulong test1, test2;
 
@@ -107,9 +113,9 @@ long int initdram (int board_type)
 
        /* find RAM size using SDRAM CS0 only */
        sdram_start(0);
-       test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
+       test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
        sdram_start(1);
-       test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
+       test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
        if (test1 > test2) {
                sdram_start(0);
                dramsize = test1;
@@ -133,10 +139,13 @@ long int initdram (int board_type)
        *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001e;/* 2G */
 
        /* find RAM size using SDRAM CS1 only */
-       sdram_start(0);
-       test1 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
-       sdram_start(1);
-       test2 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
+       if (!dramsize)
+               sdram_start(0);
+       test2 = test1 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
+       if (!dramsize) {
+               sdram_start(1);
+               test2 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
+       }
        if (test1 > test2) {
                sdram_start(0);
                dramsize2 = test1;
@@ -177,6 +186,24 @@ long int initdram (int board_type)
 
 #endif /* CFG_RAMBOOT */
 
+       /*
+        * On MPC5200B we need to set the special configuration delay in the
+        * DDR controller. Please refer to Freescale's AN3221 "MPC5200B SDRAM
+        * Initialization and Configuration", 3.3.1 SDelay--MBAR + 0x0190:
+        *
+        * "The SDelay should be written to a value of 0x00000004. It is
+        * required to account for changes caused by normal wafer processing
+        * parameters."
+        */
+       svr = get_svr();
+       pvr = get_pvr();
+       if ((SVR_MJREV(svr) >= 2) &&
+           (PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) {
+
+               *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
+               __asm__ volatile ("sync");
+       }
+
        return dramsize + dramsize2;
 }
 
@@ -204,9 +231,9 @@ long int initdram (int board_type)
 
        /* find RAM size */
        sdram_start(0);
-       test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
+       test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
        sdram_start(1);
-       test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
+       test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
        if (test1 > test2) {
                sdram_start(0);
                dramsize = test1;
@@ -233,7 +260,9 @@ long int initdram (int board_type)
 
 int checkboard (void)
 {
-#if defined(CONFIG_MPC5200)
+#if defined (CONFIG_LITE5200B)
+       puts ("Board: Freescale Lite5200B\n");
+#elif defined(CONFIG_MPC5200)
        puts ("Board: Motorola MPC5200 (IceCube)\n");
 #elif defined(CONFIG_MGT5100)
        puts ("Board: Motorola MGT5100 (IceCube)\n");
@@ -288,6 +317,8 @@ void init_ide_reset (void)
        /* Configure PSC1_4 as GPIO output for ATA reset */
        *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC1_4;
        *(vu_long *) MPC5XXX_WU_GPIO_DIR    |= GPIO_PSC1_4;
+       /* Deassert reset */
+       *(vu_long *) MPC5XXX_WU_GPIO_DATA   |= GPIO_PSC1_4;
 }
 
 void ide_set_reset (int idereset)
@@ -296,6 +327,8 @@ void ide_set_reset (int idereset)
 
        if (idereset) {
                *(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
+               /* Make a delay. MPC5200 spec says 25 usec min */
+               udelay(500000);
        } else {
                *(vu_long *) MPC5XXX_WU_GPIO_DATA |=  GPIO_PSC1_4;
        }