board: gateworks: venice: add imx8mp-venice-gw740x support

[platform/kernel/u-boot.git] / board / gateworks / venice / spl.c

diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c
index ba7118a..223f22d 100644 (file)
--- a/board/gateworks/venice/spl.c
+++ b/board/gateworks/venice/spl.c
@@ -13,6 +13,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/imx8mm_pins.h>
 #include <asm/arch/imx8mn_pins.h>
+#include <asm/arch/imx8mp_pins.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/mach-imx/boot_mode.h>
 #include <asm/arch/ddr.h>
@@ -22,6 +23,7 @@
 #include <linux/delay.h>
 #include <power/bd71837.h>
 #include <power/mp5416.h>
+#include <power/pca9450.h>
 
 #include "eeprom.h"
 #include "lpddr4_timing.h"
@@ -50,8 +52,7 @@ static void spl_dram_init(int size)
                printf("Unknown DDR configuration: %d MiB\n", size);
                dram_timing = &dram_timing_1gb;
                size = 1024;
-#endif
-#ifdef CONFIG_IMX8MN
+#elif CONFIG_IMX8MN
        case 1024:
                dram_timing = &dram_timing_1gb_single_die;
                break;
@@ -67,6 +68,14 @@ static void spl_dram_init(int size)
                printf("Unknown DDR configuration: %d MiB\n", size);
                dram_timing = &dram_timing_2gb_dual_die;
                size = 2048;
+#elif CONFIG_IMX8MP
+       case 4096:
+               dram_timing = &dram_timing_4gb_dual_die;
+               break;
+       default:
+               printf("Unknown DDR configuration: %d GiB\n", size);
+               dram_timing = &dram_timing_4gb_dual_die;
+               size = 4096;
 #endif
        }
 
@@ -90,8 +99,7 @@ static iomux_v3_cfg_t const uart_pads[] = {
 static iomux_v3_cfg_t const wdog_pads[] = {
        IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
 };
-#endif
-#ifdef CONFIG_IMX8MN
+#elif CONFIG_IMX8MN
 static const iomux_v3_cfg_t uart_pads[] = {
        IMX8MN_PAD_UART2_RXD__UART2_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
        IMX8MN_PAD_UART2_TXD__UART2_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
@@ -100,6 +108,16 @@ static const iomux_v3_cfg_t uart_pads[] = {
 static const iomux_v3_cfg_t wdog_pads[] = {
        IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
 };
+#elif CONFIG_IMX8MP
+static const iomux_v3_cfg_t uart_pads[] = {
+       MX8MP_PAD_UART2_RXD__UART2_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+       MX8MP_PAD_UART2_TXD__UART2_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
+static const iomux_v3_cfg_t wdog_pads[] = {
+       MX8MP_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
+};
+
 #endif
 
 int board_early_init_f(void)
@@ -165,6 +183,41 @@ static int power_init_board(void)
                                 BIT(7) | MP5416_VSET_SW3_SVAL(920000));
        }
 
+       else if (!strncmp(model, "GW74", 4)) {
+               ret = uclass_get_device_by_seq(UCLASS_I2C, 0, &bus);
+               if (ret) {
+                       printf("PMIC    : failed I2C1 probe: %d\n", ret);
+                       return ret;
+               }
+               ret = dm_i2c_probe(bus, 0x25, 0, &dev);
+               if (ret) {
+                       printf("PMIC    : failed probe: %d\n", ret);
+                       return ret;
+               }
+               puts("PMIC    : PCA9450\n");
+
+               /* BUCKxOUT_DVS0/1 control BUCK123 output */
+               dm_i2c_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
+
+               /* Buck 1 DVS control through PMIC_STBY_REQ */
+               dm_i2c_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
+
+               /* Set DVS1 to 0.8v for suspend */
+               dm_i2c_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x10);
+
+               /* increase VDD_DRAM to 0.95v for 3Ghz DDR */
+               dm_i2c_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x1C);
+
+               /* VDD_DRAM off in suspend: B1_ENMODE=10 */
+               dm_i2c_reg_write(dev, PCA9450_BUCK3CTRL, 0x4a);
+
+               /* set VDD_SNVS_0V8 from default 0.85V */
+               dm_i2c_reg_write(dev, PCA9450_LDO2CTRL, 0xC0);
+
+               /* set WDOG_B_CFG to cold reset */
+               dm_i2c_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
+       }
+
        else if ((!strncmp(model, "GW7901", 6)) ||
                 (!strncmp(model, "GW7902", 6))) {
                if (!strncmp(model, "GW7901", 6))
@@ -277,15 +330,22 @@ void board_init_f(ulong dummy)
 /* determine prioritized order of boot devices to load U-Boot from */
 void board_boot_order(u32 *spl_boot_list)
 {
+       int i = 0;
+
        /*
         * If the SPL was loaded via serial loader, we try to get
         * U-Boot proper via USB SDP.
         */
-       if (spl_boot_device() == BOOT_DEVICE_BOARD)
-               spl_boot_list[0] = BOOT_DEVICE_BOARD;
+       if (spl_boot_device() == BOOT_DEVICE_BOARD) {
+#ifdef CONFIG_IMX8MM
+               spl_boot_list[i++] = BOOT_DEVICE_BOARD;
+#else
+               spl_boot_list[i++] = BOOT_DEVICE_BOOTROM;
+#endif
+       }
 
        /* we have only eMMC in default venice dt */
-       spl_boot_list[0] = BOOT_DEVICE_MMC1;
+       spl_boot_list[i++] = BOOT_DEVICE_MMC1;
 }
 
 /* return boot device based on where the SPL was loaded from */