#define MEM_SDTR1_INIT_VAL 0x00854005
#define SDRAM0_CFG_ENABLE 0x80000000
-#define CFG_SDRAM_SIZE 0x04000000 /* 64 MB */
+#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 MB */
int board_early_init_f (void)
{
/*
* EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
*/
- mtebc (epcr, 0xa8400000); /* ebc always driven */
+ mtebc (EBC0_CFG, 0xa8400000); /* ebc always driven */
#endif
return 0;
/*
* Set NAND-FLASH GPIO signals to default
*/
- out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
+ out32(GPIO0_OR, in32(GPIO0_OR) & ~(CONFIG_SYS_NAND_CLE | CONFIG_SYS_NAND_ALE));
+ out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_NAND_CE);
#endif
return (0);
long int init_sdram_static_settings(void)
{
-#define mtsdram0(reg, data) mtdcr(memcfga,reg);mtdcr(memcfgd,data)
+#define mtsdram0(reg, data) mtdcr(SDRAM0_CFGADDR,reg);mtdcr(SDRAM0_CFGDATA,data)
/* disable memcontroller so updates work */
mtsdram0( mem_mcopt1, MEM_MCOPT1_INIT_VAL );
mtsdram0( mem_rtr , MEM_RTR_INIT_VAL );
udelay(500);
mtsdram0( mem_mcopt1, MEM_MCOPT1_INIT_VAL|SDRAM0_CFG_ENABLE );
- return (CFG_SDRAM_SIZE); /* CFG_SDRAM_SIZE is in G2000.h */
+ return (CONFIG_SYS_SDRAM_SIZE); /* CONFIG_SYS_SDRAM_SIZE is in G2000.h */
}
return ret;
}
-
-#if defined(CONFIG_CMD_NAND)
-#include <linux/mtd/nand_legacy.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- nand_probe(CFG_NAND_BASE);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-}
-#endif
-
-
#if 0 /* test-only !!! */
int do_dumpebc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
ulong ap, cr;
printf("\nEBC registers for PPC405GP:\n");
- mfebc(pb0ap, ap); mfebc(pb0cr, cr);
+ mfebc(PB0AP, ap); mfebc(PB0CR, cr);
printf("0: AP=%08lx CP=%08lx\n", ap, cr);
- mfebc(pb1ap, ap); mfebc(pb1cr, cr);
+ mfebc(PB1AP, ap); mfebc(PB1CR, cr);
printf("1: AP=%08lx CP=%08lx\n", ap, cr);
- mfebc(pb2ap, ap); mfebc(pb2cr, cr);
+ mfebc(PB2AP, ap); mfebc(PB2CR, cr);
printf("2: AP=%08lx CP=%08lx\n", ap, cr);
- mfebc(pb3ap, ap); mfebc(pb3cr, cr);
+ mfebc(PB3AP, ap); mfebc(PB3CR, cr);
printf("3: AP=%08lx CP=%08lx\n", ap, cr);
- mfebc(pb4ap, ap); mfebc(pb4cr, cr);
+ mfebc(PB4AP, ap); mfebc(PB4CR, cr);
printf("4: AP=%08lx CP=%08lx\n", ap, cr);
printf("\n");
}
U_BOOT_CMD(
dumpebc, 1, 1, do_dumpebc,
- "dumpebc - Dump all EBC registers\n",
- NULL
+ "Dump all EBC registers",
+ ""
);
}
U_BOOT_CMD(
dumpdcr, 1, 1, do_dumpdcr,
- "dumpdcr - Dump all DCR registers\n",
- NULL
+ "Dump all DCR registers",
+ ""
);
}
U_BOOT_CMD(
dumpspr, 1, 1, do_dumpspr,
- "dumpspr - Dump all SPR registers\n",
- NULL
+ "Dump all SPR registers",
+ ""
);
#endif