int board_early_init_f(void)
{
- ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
/* board only uses the DDR_MCK0/1, so disable the DDR_MCK2/3 */
setbits_be32(&gur->ddrclkdr, 0x000f000f);
void board_config_lanes_mux(void)
{
- ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+ ccsr_gur_t *gur = (void *)CFG_SYS_MPC85xx_GUTS_ADDR;
int srds_prtcl = (in_be32(&gur->rcwsr[4]) &
FSL_CORENET_RCWSR4_SRDS_PRTCL) >> 26;
int misc_init_r(void)
{
- serdes_corenet_t *regs = (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
+ serdes_corenet_t *regs = (void *)CFG_SYS_FSL_CORENET_SERDES_ADDR;
u32 actual[NUM_SRDS_BANKS];
unsigned int i;
u8 sw;