#define GPIO_SLIC_PIN 30
#define GPIO_SLIC_DATA (1 << (31 - GPIO_SLIC_PIN))
-#if defined(CONFIG_TARGET_P1021RDB) && !defined(CONFIG_SYS_RAMBOOT)
-#define GPIO_DDR_RST_PORT 1
-#define GPIO_DDR_RST_PIN 8
-#define GPIO_DDR_RST_DATA (1 << (31 - GPIO_DDR_RST_PIN))
-
-#define GPIO_2BIT_MASK (0x3 << (32 - (GPIO_DDR_RST_PIN + 1) * 2))
-#endif
-
-#if defined(CONFIG_TARGET_P1021RDB)
-#define PCA_IOPORT_I2C_ADDR 0x23
-#define PCA_IOPORT_OUTPUT_CMD 0x2
-#define PCA_IOPORT_CFG_CMD 0x6
-#define PCA_IOPORT_QE_PIN_ENABLE 0xf8
-#define PCA_IOPORT_QE_TDM_ENABLE 0xf6
-#endif
-
const qe_iop_conf_t qe_iop_conf_tab[] = {
/* GPIO */
{1, 1, 2, 0, 0}, /* GPIO7/PB1 - LOAD_DEFAULT_N */
-#if defined(CONFIG_TARGET_P1021RDB) && !defined(CONFIG_SYS_RAMBOOT)
- {1, 8, 1, 1, 0}, /* GPIO10/PB8 - DDR_RST */
-#endif
{0, 15, 1, 0, 0}, /* GPIO11/A15 - WDI */
{GPIO_GETH_SW_PORT, GPIO_GETH_SW_PIN, 1, 0, 0}, /* RST_GETH_SW_N */
{GPIO_SLIC_PORT, GPIO_SLIC_PIN, 1, 0, 0}, /* RST_SLIC_N */
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
par_io_t *par_io = (par_io_t *) &(gur->qe_par_io);
-#if defined(CONFIG_TARGET_P1021RDB) && !defined(CONFIG_SYS_RAMBOOT)
- /* reset DDR3 */
- setbits_be32(&par_io[GPIO_DDR_RST_PORT].cpdat, GPIO_DDR_RST_DATA);
- udelay(1000);
- clrbits_be32(&par_io[GPIO_DDR_RST_PORT].cpdat, GPIO_DDR_RST_DATA);
- udelay(1000);
- setbits_be32(&par_io[GPIO_DDR_RST_PORT].cpdat, GPIO_DDR_RST_DATA);
- /* disable CE_PB8 */
- clrbits_be32(&par_io[GPIO_DDR_RST_PORT].cpdir1, GPIO_2BIT_MASK);
-#endif
/* Enable VSC7385 switch */
setbits_be32(&par_io[GPIO_GETH_SW_PORT].cpdat, GPIO_GETH_SW_DATA);
}
#endif
-#if defined(CONFIG_QE) && \
- (defined(CONFIG_TARGET_P1021RDB))
-static void fdt_board_fixup_qe_pins(void *blob)
-{
- unsigned int oldbus;
- u8 val8;
- int node;
- fsl_lbc_t *lbc = LBC_BASE_ADDR;
-
- if (hwconfig("qe")) {
- /* For QE and eLBC pins multiplexing,
- * there is a PCA9555 device on P1025RDB.
- * It control the multiplex pins' functions,
- * and setting the PCA9555 can switch the
- * function between QE and eLBC.
- */
- oldbus = i2c_get_bus_num();
- i2c_set_bus_num(0);
- if (hwconfig("tdm"))
- val8 = PCA_IOPORT_QE_TDM_ENABLE;
- else
- val8 = PCA_IOPORT_QE_PIN_ENABLE;
- i2c_write(PCA_IOPORT_I2C_ADDR, PCA_IOPORT_CFG_CMD,
- 1, &val8, 1);
- i2c_write(PCA_IOPORT_I2C_ADDR, PCA_IOPORT_OUTPUT_CMD,
- 1, &val8, 1);
- i2c_set_bus_num(oldbus);
- /* if run QE TDM, Set ABSWP to implement
- * conversion of addresses in the eLBC.
- */
- if (hwconfig("tdm")) {
- set_lbc_or(2, CONFIG_PMC_OR_PRELIM);
- set_lbc_br(2, CONFIG_PMC_BR_PRELIM);
- setbits_be32(&lbc->lbcr, CONFIG_SYS_LBC_LBCR);
- }
- } else {
- node = fdt_path_offset(blob, "/qe");
- if (node >= 0)
- fdt_del_node(blob, node);
- }
-
- return;
-}
-#endif
-
#ifdef CONFIG_OF_BOARD_SETUP
int ft_board_setup(void *blob, struct bd_info *bd)
{
#ifdef CONFIG_QE
do_fixup_by_compat(blob, "fsl,qe", "status", "okay",
sizeof("okay"), 0);
-#if defined(CONFIG_TARGET_P1021RDB)
- fdt_board_fixup_qe_pins(blob);
-#endif
#endif
#if defined(CONFIG_HAS_FSL_DR_USB)