powerpc/85xx: Cleanup SGMII detection and reporting

[platform/kernel/u-boot.git] / board / freescale / p1_p2_rdb / pci.c

diff --git a/board/freescale/p1_p2_rdb/pci.c b/board/freescale/p1_p2_rdb/pci.c
index 97d4f83..2034459 100644 (file)
--- a/board/freescale/p1_p2_rdb/pci.c
+++ b/board/freescale/p1_p2_rdb/pci.c
@@ -24,6 +24,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/immap_85xx.h>
+#include <asm/fsl_serdes.h>
 #include <asm/io.h>
 #include <asm/fsl_pci.h>
 #include <libfdt.h>
@@ -43,7 +44,7 @@ void pci_init_board(void)
 {
        volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
        struct fsl_pci_info pci_info[2];
-       u32 devdisr, pordevsr, io_sel;
+       u32 devdisr, pordevsr;
        int first_free_busno = 0;
        int num = 0;
 
@@ -51,27 +52,21 @@ void pci_init_board(void)
 
        devdisr = in_be32(&gur->devdisr);
        pordevsr = in_be32(&gur->pordevsr);
-       io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
-
-       debug ("   pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
-
-       if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
-               printf ("    eTSEC2 is in sgmii mode.\n");
 
        puts("\n");
 #ifdef CONFIG_PCIE2
-       pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
+       pcie_configured = is_serdes_configured(PCIE2);
 
        if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
                SET_STD_PCIE_INFO(pci_info[num], 2);
                pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
-               printf("    PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
-                               pcie_ep ? "Endpoint" : "Root Complex",
-                               pci_info[num].regs);
+               printf("PCIE2: connected to Slot 1 as %s (base addr %lx)\n",
+                       pcie_ep ? "Endpoint" : "Root Complex",
+                       pci_info[num].regs);
                first_free_busno = fsl_pci_init_port(&pci_info[num++],
                                        &pcie2_hose, first_free_busno);
        } else {
-               printf ("    PCIE2: disabled\n");
+               printf("PCIE2: disabled\n");
        }
        puts("\n");
 #else
@@ -79,18 +74,18 @@ void pci_init_board(void)
 #endif
 
 #ifdef CONFIG_PCIE1
-       pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
+       pcie_configured = is_serdes_configured(PCIE1);
 
        if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
                SET_STD_PCIE_INFO(pci_info[num], 1);
                pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
-               printf("    PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
-                               pcie_ep ? "Endpoint" : "Root Complex",
-                               pci_info[num].regs);
+               printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n",
+                       pcie_ep ? "Endpoint" : "Root Complex",
+                       pci_info[num].regs);
                first_free_busno = fsl_pci_init_port(&pci_info[num++],
                                        &pcie1_hose, first_free_busno);
        } else {
-               printf ("    PCIE1: disabled\n");
+               printf("PCIE1: disabled\n");
        }
        puts("\n");
 #else