p1_p2_rdb: to set SQW/INT pin of RTC as INT line

[platform/kernel/u-boot.git] / board / freescale / p1_p2_rdb / p1_p2_rdb.c

diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c b/board/freescale/p1_p2_rdb/p1_p2_rdb.c
index 31cdf9a..1c4c020 100644 (file)
--- a/board/freescale/p1_p2_rdb/p1_p2_rdb.c
+++ b/board/freescale/p1_p2_rdb/p1_p2_rdb.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2009 Freescale Semiconductor, Inc.
+ * Copyright 2009-2010 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -33,6 +33,7 @@
 #include <tsec.h>
 #include <vsc7385.h>
 #include <netdev.h>
+#include <rtc.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -54,6 +55,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define BOARDREV_MASK  0x10100000
 #define BOARDREV_B     0x10100000
 #define BOARDREV_C     0x00100000
+#define BOARDREV_D     0x00000000
 
 #define SYSCLK_66      66666666
 #define SYSCLK_50      50000000
@@ -64,7 +66,7 @@ unsigned long get_board_sys_clk(ulong dummy)
        volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
        u32 val_gpdat, sysclk_gpio, board_rev_gpio;
 
-       val_gpdat = pgpio->gpdat;
+       val_gpdat = in_be32(&pgpio->gpdat);
        sysclk_gpio = val_gpdat & SYSCLK_MASK;
        board_rev_gpio = val_gpdat & BOARDREV_MASK;
        if (board_rev_gpio == BOARDREV_C) {
@@ -77,6 +79,11 @@ unsigned long get_board_sys_clk(ulong dummy)
                        return SYSCLK_66;
                else
                        return SYSCLK_50;
+       } else if (board_rev_gpio == BOARDREV_D) {
+               if(sysclk_gpio == 0)
+                       return SYSCLK_66;
+               else
+                       return SYSCLK_100;
        }
        return 0;
 }
@@ -100,12 +107,14 @@ int checkboard (void)
        char board_rev = 0;
        struct cpu_type *cpu;
 
-       val_gpdat = pgpio->gpdat;
+       val_gpdat = in_be32(&pgpio->gpdat);
        board_rev_gpio = val_gpdat & BOARDREV_MASK;
        if (board_rev_gpio == BOARDREV_C)
                board_rev = 'C';
        else if (board_rev_gpio == BOARDREV_B)
                board_rev = 'B';
+       else if (board_rev_gpio == BOARDREV_D)
+               board_rev = 'D';
        else
                panic ("Unexpected Board REV %x detected!!\n", board_rev_gpio);
 
@@ -148,6 +157,7 @@ int board_early_init_r(void)
        set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
                        MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                        0, flash_esel, BOOKE_PAGESZ_16M, 1);
+       rtc_reset();
        return 0;
 }
 
@@ -159,6 +169,7 @@ int board_eth_init(bd_t *bis)
        volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
        int num = 0;
        char *tmp;
+       u32 pordevsr;
        unsigned int vscfw_addr;
 
 #ifdef CONFIG_TSEC1
@@ -171,7 +182,8 @@ int board_eth_init(bd_t *bis)
 #endif
 #ifdef CONFIG_TSEC3
        SET_STD_TSEC_INFO(tsec_info[num], 3);
-       if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
+       pordevsr = in_be32(&gur->pordevsr);
+       if (!(pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
                tsec_info[num].flags |= TSEC_SGMII;
        num++;
 #endif