+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2013 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- *
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
*/
#include <common.h>
+#include <clock_legacy.h>
+#include <console.h>
+#include <env.h>
+#include <env_internal.h>
+#include <init.h>
#include <ns16550.h>
#include <malloc.h>
#include <mmc.h>
#include <i2c.h>
#include "../common/ngpixis.h"
#include <fsl_esdhc.h>
+#include <spi_flash.h>
+#include "../common/spl.h"
DECLARE_GLOBAL_DATA_PTR;
99999000, 11111000, 12499800, 13333200
};
-ulong get_effective_memsize(void)
+phys_size_t get_effective_memsize(void)
{
return CONFIG_SYS_L2_SIZE;
}
setbits_be32(&gur->pmuxcr,
in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
+#ifdef CONFIG_SPL_SPI_BOOT
+ /* Enable the SPI */
+ clrsetbits_8(&pixis->brdcfg0, PIXIS_ELBC_SPI_MASK, PIXIS_SPI);
+#endif
+
/* Read back the register to synchronize the write. */
in_be32(&gur->pmuxcr);
bus_clk / 16 / CONFIG_BAUDRATE);
#ifdef CONFIG_SPL_MMC_BOOT
puts("\nSD boot...\n");
+#elif defined(CONFIG_SPL_SPI_BOOT)
+ puts("\nSPI Flash boot...\n");
#endif
/* copy code to RAM and jump to it - this should not return */
bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
bd->bi_memsize = CONFIG_SYS_L2_SIZE;
- probecpu();
+ arch_cpu_init();
get_clocks();
mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
CONFIG_SPL_RELOC_MALLOC_SIZE);
+ gd->flags |= GD_FLG_FULL_MALLOC_INIT;
+#ifndef CONFIG_SPL_NAND_BOOT
env_init();
+#endif
#ifdef CONFIG_SPL_MMC_BOOT
mmc_initialize(bd);
#endif
/* relocate environment function pointers etc. */
+#ifdef CONFIG_SPL_NAND_BOOT
+ nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+ (uchar *)SPL_ENV_ADDR);
+
+ gd->env_addr = (ulong)(SPL_ENV_ADDR);
+ gd->env_valid = ENV_VALID;
+#else
env_relocate();
+#endif
- i2c_init(CONFIG_SYS_FSL_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+#ifdef CONFIG_SYS_I2C
+ i2c_init_all();
+#else
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+#endif
- gd->ram_size = initdram(0);
+ dram_init();
+#ifdef CONFIG_SPL_NAND_BOOT
+ puts("Tertiary program loader running in sram...");
+#else
puts("Second program loader running in sram...\n");
+#endif
#ifdef CONFIG_SPL_MMC_BOOT
mmc_boot();
+#elif defined(CONFIG_SPL_SPI_BOOT)
+ fsl_spi_boot();
+#elif defined(CONFIG_SPL_NAND_BOOT)
+ nand_boot();
#endif
}