Merge branch 'next'

[platform/kernel/u-boot.git] / board / freescale / mx6ullevk / mx6ullevk.c

diff --git a/board/freescale/mx6ullevk/mx6ullevk.c b/board/freescale/mx6ullevk/mx6ullevk.c
index e119347..86c11c7 100644 (file)
--- a/board/freescale/mx6ullevk/mx6ullevk.c
+++ b/board/freescale/mx6ullevk/mx6ullevk.c
@@ -3,12 +3,14 @@
  * Copyright (C) 2016 Freescale Semiconductor, Inc.
  */
 
+#include <init.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/mx6-pins.h>
 #include <asm/arch/sys_proto.h>
+#include <asm/global_data.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/iomux-v3.h>
 #include <asm/mach-imx/boot_mode.h>
@@ -18,6 +20,7 @@
 #include <fsl_esdhc_imx.h>
 #include <linux/sizes.h>
 #include <mmc.h>
+#include <miiphy.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -59,11 +62,57 @@ int board_early_init_f(void)
        return 0;
 }
 
+#ifdef CONFIG_FEC_MXC
+static int setup_fec(int fec_id)
+{
+       struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
+       int ret;
+
+       if (fec_id == 0) {
+               /*
+                * Use 50MHz anatop loopback REF_CLK1 for ENET1,
+                * clear gpr1[13], set gpr1[17].
+                */
+               clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK,
+                               IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK);
+       } else {
+               /*
+                * Use 50MHz anatop loopback REF_CLK2 for ENET2,
+                * clear gpr1[14], set gpr1[18].
+                */
+               clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK,
+                               IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
+       }
+
+       ret = enable_fec_anatop_clock(fec_id, ENET_50MHZ);
+       if (ret)
+               return ret;
+
+       enable_enet_clk(1);
+
+       return 0;
+}
+
+int board_phy_config(struct phy_device *phydev)
+{
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x8190);
+
+       if (phydev->drv->config)
+               phydev->drv->config(phydev);
+
+       return 0;
+}
+#endif
+
 int board_init(void)
 {
        /* Address of boot parameters */
        gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
+#ifdef CONFIG_FEC_MXC
+       setup_fec(CONFIG_FEC_ENET_DEV);
+#endif
+
        return 0;
 }
 
@@ -84,7 +133,10 @@ int board_late_init(void)
 #endif
 
 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-       env_set("board_name", "EVK");
+       if (is_cpu_type(MXC_CPU_MX6ULZ))
+               env_set("board_name", "ULZ-EVK");
+       else
+               env_set("board_name", "EVK");
        env_set("board_rev", "14X14");
 #endif
 
@@ -93,7 +145,10 @@ int board_late_init(void)
 
 int checkboard(void)
 {
-       puts("Board: MX6ULL 14x14 EVK\n");
+       if (is_cpu_type(MXC_CPU_MX6ULZ))
+               puts("Board: MX6ULZ 14x14 EVK\n");
+       else
+               puts("Board: MX6ULL 14x14 EVK\n");
 
        return 0;
 }