mpc8569mds: fix consuming long time while relocating code.

[platform/kernel/u-boot.git] / board / freescale / mpc8569mds / mpc8569mds.c

diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c
index 4612d16..795e565 100644 (file)
--- a/board/freescale/mpc8569mds/mpc8569mds.c
+++ b/board/freescale/mpc8569mds/mpc8569mds.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2009 Freescale Semiconductor.
+ * Copyright 2009-2010 Freescale Semiconductor.
  *
  * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
  *
@@ -27,6 +27,7 @@
 #include <pci.h>
 #include <asm/processor.h>
 #include <asm/mmu.h>
+#include <asm/cache.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_pci.h>
 #include <asm/fsl_ddr_sdram.h>
@@ -39,6 +40,9 @@
 #include <fsl_esdhc.h>
 
 #include "bcsr.h"
+#if defined(CONFIG_PQ_MDS_PIB)
+#include "../common/pq-mds-pib.h"
+#endif
 
 phys_size_t fixed_sdram(void);
 
@@ -208,6 +212,31 @@ int board_early_init_f (void)
        return 0;
 }
 
+int board_early_init_r(void)
+{
+       const unsigned int flashbase = CONFIG_SYS_NAND_BASE;
+       const u8 flash_esel = 0;
+
+       /*
+        * Remap Boot flash to caching-inhibited
+        * so that flash can be erased properly.
+        */
+
+       /* Flush d-cache and invalidate i-cache of any FLASH data */
+       flush_dcache();
+       invalidate_icache();
+
+       /* invalidate existing TLB entry for flash */
+       disable_tlb(flash_esel);
+
+       set_tlb(1, flashbase, CONFIG_SYS_NAND_BASE,     /* tlb, epn, rpn */
+               MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, /* perms, wimge */
+               0, flash_esel,                          /* ts, esel */
+               BOOKE_PAGESZ_64M, 1);                   /* tsize, iprot */
+
+       return 0;
+}
+
 int checkboard (void)
 {
        printf ("Board: 8569 MDS\n");
@@ -305,7 +334,7 @@ void
 local_bus_init(void)
 {
        volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-       volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
+       volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
 
        uint clkdiv;
        uint lbc_hz;
@@ -437,6 +466,11 @@ int board_mmc_init(bd_t *bd)
                console_assign(stdin, "eserial1");
                printf("Switched to UART1 (initial log has been printed to "
                       "UART0).\n");
+
+               clrsetbits_be32(&gur->plppar1, PLPPAR1_UART0_BIT_MASK,
+                                              PLPPAR1_ESDHC_4BITS_VAL);
+               clrsetbits_be32(&gur->plpdir1, PLPDIR1_UART0_BIT_MASK,
+                                              PLPDIR1_ESDHC_4BITS_VAL);
                bcsr6 |= BCSR6_SD_CARD_4BITS;
        } else {
                printf("should be disabled.\n");
@@ -483,6 +517,15 @@ static void fdt_board_fixup_esdhc(void *blob, bd_t *bd)
                        break;
                }
        }
+
+       if (hwconfig_subarg_cmp("esdhc", "mode", "4-bits")) {
+               off = fdt_node_offset_by_compatible(blob, -1, "fsl,esdhc");
+               if (off < 0) {
+                       printf("WARNING: could not find esdhc node\n");
+                       return;
+               }
+               fdt_delprop(blob, off, "sdhci,1-bit-only");
+       }
 }
 #else
 static inline void fdt_board_fixup_esdhc(void *blob, bd_t *bd) {}
@@ -531,6 +574,10 @@ void pci_init_board(void)
 
        debug ("   pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
 
+#if defined(CONFIG_PQ_MDS_PIB)
+       pib_init();
+#endif
+
 #ifdef CONFIG_PCIE1
        pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
 
@@ -538,7 +585,7 @@ void pci_init_board(void)
                SET_STD_PCIE_INFO(pci_info[num], 1);
                pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
                printf ("    PCIE1 connected to Slot as %s (base addr %lx)\n",
-                               pcie_ep ? "End Point" : "Root Complex",
+                               pcie_ep ? "Endpoint" : "Root Complex",
                                pci_info[num].regs);
                first_free_busno = fsl_pci_init_port(&pci_info[num++],
                                        &pcie1_hose, first_free_busno);
@@ -614,9 +661,8 @@ void ft_board_setup(void *blob, bd_t *bd)
 #endif
        ft_cpu_setup(blob, bd);
 
-#ifdef CONFIG_PCIE1
-       ft_fsl_pci_setup(blob, "pci1", &pcie1_hose);
-#endif
+       FT_FSL_PCI_SETUP;
+
        fdt_board_fixup_esdhc(blob, bd);
        fdt_board_fixup_qe_uart(blob, bd);
        fdt_board_fixup_qe_usb(blob, bd);