global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_*
[platform/kernel/u-boot.git] / board / freescale / ls1088a / ls1088a.c
index 7046fba..b70c198 100644 (file)
@@ -1,8 +1,10 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2017-2018 NXP
+ * Copyright 2017-2022 NXP
  */
 #include <common.h>
+#include <clock_legacy.h>
+#include <display_options.h>
 #include <env.h>
 #include <i2c.h>
 #include <init.h>
@@ -12,7 +14,6 @@
 #include <netdev.h>
 #include <fsl_ifc.h>
 #include <fsl_ddr.h>
-#include <fsl_sec.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
 #include <fdt_support.h>
@@ -72,15 +73,15 @@ struct ifc_regs ifc_cfg_ifc_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
        },
        {
                "nand",
-               CONFIG_SYS_NAND_CSPR,
-               CONFIG_SYS_NAND_CSPR_EXT,
-               CONFIG_SYS_NAND_AMASK,
-               CONFIG_SYS_NAND_CSOR,
+               CFG_SYS_NAND_CSPR,
+               CFG_SYS_NAND_CSPR_EXT,
+               CFG_SYS_NAND_AMASK,
+               CFG_SYS_NAND_CSOR,
                {
-                       CONFIG_SYS_NAND_FTIM0,
-                       CONFIG_SYS_NAND_FTIM1,
-                       CONFIG_SYS_NAND_FTIM2,
-                       CONFIG_SYS_NAND_FTIM3
+                       CFG_SYS_NAND_FTIM0,
+                       CFG_SYS_NAND_FTIM1,
+                       CFG_SYS_NAND_FTIM2,
+                       CFG_SYS_NAND_FTIM3
                },
        },
        {
@@ -104,15 +105,15 @@ struct ifc_regs ifc_cfg_ifc_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
 struct ifc_regs ifc_cfg_qspi_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
        {
                "nand",
-               CONFIG_SYS_NAND_CSPR,
-               CONFIG_SYS_NAND_CSPR_EXT,
-               CONFIG_SYS_NAND_AMASK,
-               CONFIG_SYS_NAND_CSOR,
+               CFG_SYS_NAND_CSPR,
+               CFG_SYS_NAND_CSPR_EXT,
+               CFG_SYS_NAND_AMASK,
+               CFG_SYS_NAND_CSOR,
                {
-                       CONFIG_SYS_NAND_FTIM0,
-                       CONFIG_SYS_NAND_FTIM1,
-                       CONFIG_SYS_NAND_FTIM2,
-                       CONFIG_SYS_NAND_FTIM3
+                       CFG_SYS_NAND_FTIM0,
+                       CFG_SYS_NAND_FTIM1,
+                       CFG_SYS_NAND_FTIM2,
+                       CFG_SYS_NAND_FTIM3
                },
        },
        {
@@ -374,6 +375,7 @@ bool if_board_diff_clk(void)
 #endif
 }
 
+#ifdef CONFIG_DYNAMIC_SYS_CLK_FREQ
 unsigned long get_board_sys_clk(void)
 {
        u8 sysclk_conf = QIXIS_READ(brdcfg[1]);
@@ -397,7 +399,9 @@ unsigned long get_board_sys_clk(void)
 
        return 66666666;
 }
+#endif
 
+#ifdef CONFIG_DYNAMIC_DDR_CLK_FREQ
 unsigned long get_board_ddr_clk(void)
 {
        u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);
@@ -415,6 +419,7 @@ unsigned long get_board_ddr_clk(void)
 
        return 66666666;
 }
+#endif
 
 #if !defined(CONFIG_SPL_BUILD)
 void board_retimer_init(void)
@@ -815,9 +820,6 @@ int board_init(void)
        out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR105_IRQ_MASK);
 #endif
 
-#ifdef CONFIG_FSL_CAAM
-       sec_init();
-#endif
 #ifdef CONFIG_FSL_LS_PPA
        ppa_init();
 #endif
@@ -899,10 +901,10 @@ void fsl_fdt_fixup_flash(void *fdt)
        }
 
        if (disable_ifc) {
-               offset = fdt_path_offset(fdt, "/soc/ifc/nor");
+               offset = fdt_path_offset(fdt, "/soc/memory-controller/nor");
 
                if (offset < 0)
-                       offset = fdt_path_offset(fdt, "/ifc/nor");
+                       offset = fdt_path_offset(fdt, "/memory-controller/nor");
        } else {
                offset = fdt_path_offset(fdt, "/soc/quadspi");
 
@@ -912,10 +914,10 @@ void fsl_fdt_fixup_flash(void *fdt)
 
 #else
 #ifdef CONFIG_FSL_QSPI
-       offset = fdt_path_offset(fdt, "/soc/ifc/nor");
+       offset = fdt_path_offset(fdt, "/soc/memory-controller/nor");
 
        if (offset < 0)
-               offset = fdt_path_offset(fdt, "/ifc/nor");
+               offset = fdt_path_offset(fdt, "/memory-controller/nor");
 #else
        offset = fdt_path_offset(fdt, "/soc/quadspi");
 
@@ -1029,7 +1031,7 @@ int is_flash_available(void)
 #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
 void *env_sf_get_env_addr(void)
 {
-       return (void *)(CONFIG_SYS_FSL_QSPI_BASE + CONFIG_ENV_OFFSET);
+       return (void *)(CFG_SYS_FSL_QSPI_BASE + CONFIG_ENV_OFFSET);
 }
 #endif
 #endif