// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright 2017-2018 NXP
+ * Copyright 2017-2022 NXP
*/
#include <common.h>
#include <clock_legacy.h>
#include <netdev.h>
#include <fsl_ifc.h>
#include <fsl_ddr.h>
-#include <fsl_sec.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <fdt_support.h>
out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR105_IRQ_MASK);
#endif
-#ifdef CONFIG_FSL_CAAM
- sec_init();
-#endif
#ifdef CONFIG_FSL_LS_PPA
ppa_init();
#endif
}
if (disable_ifc) {
- offset = fdt_path_offset(fdt, "/soc/ifc/nor");
+ offset = fdt_path_offset(fdt, "/soc/memory-controller/nor");
if (offset < 0)
- offset = fdt_path_offset(fdt, "/ifc/nor");
+ offset = fdt_path_offset(fdt, "/memory-controller/nor");
} else {
offset = fdt_path_offset(fdt, "/soc/quadspi");
#else
#ifdef CONFIG_FSL_QSPI
- offset = fdt_path_offset(fdt, "/soc/ifc/nor");
+ offset = fdt_path_offset(fdt, "/soc/memory-controller/nor");
if (offset < 0)
- offset = fdt_path_offset(fdt, "/ifc/nor");
+ offset = fdt_path_offset(fdt, "/memory-controller/nor");
#else
offset = fdt_path_offset(fdt, "/soc/quadspi");