Merge branch 'next'

[platform/kernel/u-boot.git] / board / freescale / ls1046ardb / ls1046ardb.c

diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c
index 0a73fe8..f2949cf 100644 (file)
--- a/board/freescale/ls1046ardb/ls1046ardb.c
+++ b/board/freescale/ls1046ardb/ls1046ardb.c
@@ -6,6 +6,10 @@
 #include <common.h>
 #include <i2c.h>
 #include <fdt_support.h>
+#include <init.h>
+#include <semihosting.h>
+#include <serial.h>
+#include <asm/global_data.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
@@ -25,6 +29,15 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+struct serial_device *default_serial_console(void)
+{
+#if IS_ENABLED(CONFIG_SEMIHOSTING_SERIAL)
+       if (semihosting_enabled())
+               return &serial_smh_device;
+#endif
+       return &eserial1_device;
+}
+
 int board_early_init_f(void)
 {
        fsl_lsch2_early_init_f();
@@ -69,7 +82,7 @@ int board_init(void)
 {
        struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
 
-#ifdef CONFIG_SECURE_BOOT
+#ifdef CONFIG_NXP_ESBC
        /*
         * In case of Secure Boot, the IBR configures the SMMU
         * to allow only Secure transactions.
@@ -91,6 +104,10 @@ int board_init(void)
        ppa_init();
 #endif
 
+#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH)
+       pci_init();
+#endif
+
        /* invert AQR105 IRQ pins polarity */
        out_be32(&scfg->intpcr, AQR105_IRQ_MASK);
 
@@ -157,7 +174,7 @@ int misc_init_r(void)
 }
 #endif
 
-int ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
 {
        u64 base[CONFIG_NR_DRAM_BANKS];
        u64 size[CONFIG_NR_DRAM_BANKS];
@@ -172,8 +189,10 @@ int ft_board_setup(void *blob, bd_t *bd)
        ft_cpu_setup(blob, bd);
 
 #ifdef CONFIG_SYS_DPAA_FMAN
+#ifndef CONFIG_DM_ETH
        fdt_fixup_fman_ethernet(blob);
 #endif
+#endif
 
        fdt_fixup_icid(blob);