#include <common.h>
#include <i2c.h>
#include <fdt_support.h>
+#include <fsl_ddr_sdram.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/fsl_serdes.h>
+#include <asm/arch/ppa.h>
#include <asm/arch/fdt.h>
+#include <asm/arch/mmu.h>
#include <asm/arch/soc.h>
#include <ahci.h>
#include <hwconfig.h>
* before accessing DDR SPD.
*/
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
- gd->ram_size = initdram(0);
+ fsl_initdram();
+#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
+ /* This will break-before-make MMU for DDR */
+ update_early_mmu_table();
+#endif
return 0;
}
config_serdes_mux();
#endif
+#ifdef CONFIG_FSL_LS_PPA
+ ppa_init();
+#endif
+
return 0;
}