{
#ifdef CONFIG_TARGET_LS1012ARDB
/* Through reset IO expander reset both RGMII and SGMII PHYs */
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;
struct mii_dev *bus;
struct pfe_mdio_info mac_mdio_info;
struct pfe_eth_dev *priv = dev_get_priv(dev);
- struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
+ struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR;
int srds_s1 = in_be32(&gur->rcwsr[4]) &
FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK;
/* MAC1 */
pfe_set_phy_address_mode(priv->gemac_port,
CONFIG_PFE_EMAC1_PHY_ADDR,
- PHY_INTERFACE_MODE_SGMII_2500);
+ PHY_INTERFACE_MODE_2500BASEX);
} else {
/* MAC2 */
pfe_set_phy_address_mode(priv->gemac_port,
CONFIG_PFE_EMAC2_PHY_ADDR,
- PHY_INTERFACE_MODE_SGMII_2500);
+ PHY_INTERFACE_MODE_2500BASEX);
}
break;
default: