layerscape: Disable CONFIG_FMAN_ENET on *aqds* platforms

[platform/kernel/u-boot.git] / board / freescale / corenet_ds / corenet_ds.c

diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c
index 60e2100..3a83e65 100644 (file)
--- a/board/freescale/corenet_ds/corenet_ds.c
+++ b/board/freescale/corenet_ds/corenet_ds.c
@@ -1,12 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2009-2011 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <command.h>
+#include <env.h>
+#include <fdt_support.h>
+#include <image.h>
+#include <init.h>
 #include <netdev.h>
+#include <asm/global_data.h>
 #include <linux/compiler.h>
 #include <asm/mmu.h>
 #include <asm/processor.h>
@@ -14,7 +18,6 @@
 #include <asm/immap_85xx.h>
 #include <asm/fsl_law.h>
 #include <asm/fsl_serdes.h>
-#include <asm/fsl_portals.h>
 #include <asm/fsl_liodn.h>
 #include <fm_eth.h>
 
@@ -27,8 +30,8 @@ int checkboard (void)
 {
        u8 sw;
        struct cpu_type *cpu = gd->arch.cpu;
-#if defined(CONFIG_P3041DS) || defined(CONFIG_P5020DS) || \
-       defined(CONFIG_P5040DS)
+#if defined(CONFIG_TARGET_P3041DS) || defined(CONFIG_TARGET_P5020DS) || \
+       defined(CONFIG_TARGET_P5040DS)
        unsigned int i;
 #endif
        static const char * const freq[] = {"100", "125", "156.25", "212.5" };
@@ -57,15 +60,15 @@ int checkboard (void)
         * don't match.
         */
        puts("SERDES Reference Clocks: ");
-#if defined(CONFIG_P3041DS) || defined(CONFIG_P5020DS) \
-       || defined(CONFIG_P5040DS)
+#if defined(CONFIG_TARGET_P3041DS) || defined(CONFIG_TARGET_P5020DS) || \
+       defined(CONFIG_TARGET_P5040DS)
        sw = in_8(&PIXIS_SW(5));
        for (i = 0; i < 3; i++) {
                unsigned int clock = (sw >> (6 - (2 * i))) & 3;
 
                printf("Bank%u=%sMhz ", i+1, freq[clock]);
        }
-#ifdef CONFIG_P5040DS
+#ifdef CONFIG_TARGET_P5040DS
        /* On P5040DS, SW11[7:8] determines the Bank 4 frequency */
        sw = in_8(&PIXIS_SW(9));
        printf("Bank4=%sMhz ", freq[sw & 3]);
@@ -101,7 +104,7 @@ int board_early_init_f(void)
 int board_early_init_r(void)
 {
        const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
-       const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+       int flash_esel = find_tlb_idx((void *)flashbase, 1);
 
        /*
         * Remap Boot flash + PROMJET region to caching-inhibited
@@ -112,35 +115,22 @@ int board_early_init_r(void)
        flush_dcache();
        invalidate_icache();
 
-       /* invalidate existing TLB entry for flash + promjet */
-       disable_tlb(flash_esel);
+       if (flash_esel == -1) {
+               /* very unlikely unless something is messed up */
+               puts("Error: Could not find TLB for FLASH BASE\n");
+               flash_esel = 2; /* give our best effort to continue */
+       } else {
+               /* invalidate existing TLB entry for flash + promjet */
+               disable_tlb(flash_esel);
+       }
 
        set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,       /* tlb, epn, rpn */
                        MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, /* perms, wimge */
                        0, flash_esel, BOOKE_PAGESZ_256M, 1);   /* ts, esel, tsize, iprot */
 
-       set_liodns();
-#ifdef CONFIG_SYS_DPAA_QBMAN
-       setup_portals();
-#endif
-
        return 0;
 }
 
-static const char *serdes_clock_to_string(u32 clock)
-{
-       switch(clock) {
-       case SRDS_PLLCR0_RFCK_SEL_100:
-               return "100";
-       case SRDS_PLLCR0_RFCK_SEL_125:
-               return "125";
-       case SRDS_PLLCR0_RFCK_SEL_156_25:
-               return "156.25";
-       default:
-               return "150";
-       }
-}
-
 #define NUM_SRDS_BANKS 3
 
 int misc_init_r(void)
@@ -150,8 +140,8 @@ int misc_init_r(void)
        unsigned int i;
        u8 sw;
 
-#if defined(CONFIG_P3041DS) || defined(CONFIG_P5020DS) \
-       || defined(CONFIG_P5040DS)
+#if defined(CONFIG_TARGET_P3041DS) || defined(CONFIG_TARGET_P5020DS) || \
+       defined(CONFIG_TARGET_P5040DS)
        sw = in_8(&PIXIS_SW(5));
        for (i = 0; i < 3; i++) {
                unsigned int clock = (sw >> (6 - (2 * i))) & 3;
@@ -198,15 +188,15 @@ int misc_init_r(void)
        return 0;
 }
 
-void ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, struct bd_info *bd)
 {
        phys_addr_t base;
        phys_size_t size;
 
        ft_cpu_setup(blob, bd);
 
-       base = getenv_bootm_low();
-       size = getenv_bootm_size();
+       base = env_get_bootm_low();
+       size = env_get_bootm_size();
 
        fdt_fixup_memory(blob, (u64)base, (u64)size);
 
@@ -215,10 +205,14 @@ void ft_board_setup(void *blob, bd_t *bd)
 #endif
 
        fdt_fixup_liodn(blob);
-       fdt_fixup_dr_usb(blob, bd);
+       fsl_fdt_fixup_dr_usb(blob, bd);
 
 #ifdef CONFIG_SYS_DPAA_FMAN
+#ifndef CONFIG_DM_ETH
        fdt_fixup_fman_ethernet(blob);
+#endif
        fdt_fixup_board_enet(blob);
 #endif
+
+       return 0;
 }