}
U_BOOT_CMD(
- diswd, 1, 0, pixis_disable_watchdog_cmd,
- "diswd - Disable watchdog timer \n",
- NULL);
+ diswd, 1, 0, pixis_disable_watchdog_cmd,
+ "Disable watchdog timer",
+ ""
+);
#ifdef CONFIG_PIXIS_SGMII_CMD
int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
}
U_BOOT_CMD(
- pixis_set_sgmii, CONFIG_SYS_MAXARGS, 1, pixis_set_sgmii,
- "pixis_set_sgmii"
- " - Enable or disable SGMII mode for a given TSEC \n",
- "\npixis_set_sgmii [TSEC num] <on|off|switch>\n"
- " TSEC num: 1,2,3,4 or 'all'. 'all' is default.\n"
- " on - enables SGMII\n"
- " off - disables SGMII\n"
- " switch - use switch settings\n");
+ pixis_set_sgmii, CONFIG_SYS_MAXARGS, 1, pixis_set_sgmii,
+ "pixis_set_sgmii"
+ " - Enable or disable SGMII mode for a given TSEC \n",
+ "\npixis_set_sgmii [TSEC num] <on|off|switch>\n"
+ " TSEC num: 1,2,3,4 or 'all'. 'all' is default.\n"
+ " on - enables SGMII\n"
+ " off - disables SGMII\n"
+ " switch - use switch settings"
+);
#endif
/*
U_BOOT_CMD(
pixis_reset, CONFIG_SYS_MAXARGS, 1, pixis_reset_cmd,
- "pixis_reset - Reset the board using the FPGA sequencer\n",
+ "Reset the board using the FPGA sequencer",
" pixis_reset\n"
" pixis_reset [altbank]\n"
" pixis_reset altbank wd\n"
" pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n"
- " pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n"
- );
+ " pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>"
+);